From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1D7E9A04BC; Fri, 9 Oct 2020 08:53:09 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8F8D71BFFB; Fri, 9 Oct 2020 08:53:06 +0200 (CEST) Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) by dpdk.org (Postfix) with ESMTP id C44321BFFA for ; Fri, 9 Oct 2020 08:53:04 +0200 (CEST) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailout.nyi.internal (Postfix) with ESMTP id 1F09C5C00E0; Fri, 9 Oct 2020 02:53:03 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute2.internal (MEProxy); Fri, 09 Oct 2020 02:53:03 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm2; bh= 5L02Musu1DQbJxtlxWDH1ZuIE5QvUcUsBxv/fjIPVCE=; b=gQMzPRMbiaQpAYNd YOUDfI0lMAFcT3vKJG5LBBCpeyLwLXa6o11vCApFk2qGLlzmCEH58HSLnpL1cnFo sCjRXYukTGEEcpSa5l9Bz0H/XNJ1PGCY8gNl9m1xJXpf37YRmCHy9kKonB6cBtWt k6GNlhCP4u0nJHsvoacgQSqy85dI5F881IxAe5YAC5D45JaQxkT6LT3/hkECkj1P hUphokuGF+Iw3mGIr3PcbwIop+nRsorPBnhh2iGdemAN32Mrt8qbtP1Smi6isBAn VLSRovvY1RIP6CWlNijAoF/F7EC+WHv919VwgE72JxNtJixIHjbR9ywvExJQZVua /gkRLQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm1; bh=5L02Musu1DQbJxtlxWDH1ZuIE5QvUcUsBxv/fjIPV CE=; b=HfA7WBvIlXSdlqfRIMSxucVClArW6zwePZBQf689v/i73LIp2XTNfld5J +iljTmgPP/IQB7QoqDPOABKPu25FhJ+Ltp4F1pbiGua+175J+B9L1UwXRf5VLFU+ u0Vx6NJ9y3yZOZXdjRgF32VsLkg5HE/3AHF2VqFdye0vEDIr3WLz8Ac3asNXCv1m S/CoBdCKQ4z3l5+fd5ik/OtIWzk+rtpuDyQrxXkhWV6De2NGkRm67Imr655M/kR3 k5AfA2s1YspyjUYbaPWZ7AXovt/puIsQgEj33dmus7oh10bSsPMoEPys33DUTNVr s+r6gnQynI0+i57BHgZ9JJhPz1PGg== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrhedtgdduuddvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkfgjfhgggfgtsehtqhertddttdejnecuhfhrohhmpefvhhhomhgr shcuofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecugg ftrfgrthhtvghrnhepkeethedtieevhfeigeejleegudefjeehkeekteeuveeiuedvveeu tdejveehveetnecukfhppeejjedrudefgedrvddtfedrudekgeenucevlhhushhtvghruf hiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehthhhomhgrshesmhhonhhjrghl ohhnrdhnvght X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id DB8CC3280065; Fri, 9 Oct 2020 02:53:00 -0400 (EDT) From: Thomas Monjalon To: Juraj =?utf-8?B?TGlua2XFoQ==?= , Ruifeng Wang Cc: "bruce.richardson@intel.com" , "dev@dpdk.org" , "jerinj@marvell.com" , Honnappa Nagarahalli , nd Date: Fri, 09 Oct 2020 08:52:58 +0200 Message-ID: <1936141.z0H9v2j6Xj@thomas> In-Reply-To: References: <1601533194-2295-1-git-send-email-juraj.linkes@pantheon.tech> <6308231.oPsEYrQ9EY@thomas> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH] build: add -moutline-atomics to default Arm build X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 09/10/2020 07:29, Ruifeng Wang: > From: Thomas Monjalon > > 01/10/2020 08:19, Juraj Linke=C5=A1: > > > -moutline-atomics allows LSE instructions to be used if available when > > > compiling for ARMv8.0 instruction set. It's enabled by default on > > > newer compilers, such as gcc-10.1. Enable the option so that earlier > > > compiler versions that support it but don't enable it by default buil= d with it. > > > > > > Signed-off-by: Juraj Linke=C5=A1 > > > --- > > > machine_args_generic =3D [ > > > - ['default', ['-march=3Darmv8-a+crc']], > > > + ['default', ['-march=3Darmv8-a+crc', '-moutline-atomics']], > > > ['native', ['-march=3Dnative']], > > > ['0xd03', ['-mcpu=3Dcortex-a53']], > > > ['0xd04', ['-mcpu=3Dcortex-a35']], > >=20 > > Why is it added only to the target "default"? > >=20 > Because 'default' target generates Armv8.0 instruction set which doesn't = include LSE extension.=20 > The flag enables LSE instructions when code runs on platforms that implem= ents LSE extension. >=20 > For other targets, machine specific 'mcpu' or 'march' flags are used. LSE= extension availability can be inferred from the given flags. > So there is not need to add '-moutline-atomics' to them.=20 OK It's not obvious that the -mcpu flags implicitly include it. What do you think adding such explanation in a v2?