From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2F4174618E; Tue, 4 Feb 2025 16:17:54 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8296442E6E; Tue, 4 Feb 2025 16:12:41 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) by mails.dpdk.org (Postfix) with ESMTP id ECD48427D0; Tue, 4 Feb 2025 16:12:28 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738681950; x=1770217950; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rAb6+rTAskPMNhNkzrQoEwuo0SJeWIr1cYKLnK/dL8U=; b=Ir4Z/s1qJjBs/QzFkKw+kq6JkSyO2+uRDkx4JLUN0Du61udVhF4nDMYZ cuRFczMZQjUrHM4M/kyiPE/3TB887FeBBl4GR+Bo0DioKnK0FM4AhEjNF CMcNLWQOmi8Pp91w1BEa3t05i23zb/K67WOKAq6NOThqaeVVaXmuxtuRF Slm3+seUD0XPx5z+Zzvrx5xSny/ofhrv/PyHe76IFZRdeYvuVXhzKjDKD Ds+eNdGWqFgpPoZCcl69C8oxe6VEebOeatQVrkolP5fiCLxm0wZmpbJYF say85nseZq8CAuVIllOiX6wDT8C0nRFdA6dpa4MYV5c+Y0jPLB61AzSBp A==; X-CSE-ConnectionGUID: sLVEOmZyS0+vFzrilipMQg== X-CSE-MsgGUID: M4K0Pa9MTxah5LJZbjYnNw== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="39097197" X-IronPort-AV: E=Sophos;i="6.13,258,1732608000"; d="scan'208";a="39097197" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Feb 2025 07:12:29 -0800 X-CSE-ConnectionGUID: PSUkbyxfQK6TQYEn7jaZZA== X-CSE-MsgGUID: zKo3s/ZPSdCKN7va6OQUZw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,258,1732608000"; d="scan'208";a="110792782" Received: from silpixa00401119.ir.intel.com ([10.55.129.167]) by fmviesa008.fm.intel.com with ESMTP; 04 Feb 2025 07:12:27 -0800 From: Anatoly Burakov To: dev@dpdk.org Cc: bruce.richardson@intel.com, stable@dpdk.org Subject: [PATCH v2 48/54] net/e1000/base: fix reset for 82580 Date: Tue, 4 Feb 2025 15:10:54 +0000 Message-ID: <19b6d4e612fed6d90e9365ea0ec032441fc51f0a.1738681726.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.43.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Barbara Skobiej Fix setting device reset status bit in e1000_reset_hw_82580() function for 82580 by first reading the register value, and then setting the device reset bit. Fixes: af75078fece3 ("first public release") Cc: stable@dpdk.org Signed-off-by: Barbara Skobiej Signed-off-by: Anatoly Burakov --- drivers/net/intel/e1000/base/e1000_82575.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/intel/e1000/base/e1000_82575.c b/drivers/net/intel/e1000/base/e1000_82575.c index ff5a5cad80..34b315a540 100644 --- a/drivers/net/intel/e1000/base/e1000_82575.c +++ b/drivers/net/intel/e1000/base/e1000_82575.c @@ -2272,7 +2272,7 @@ STATIC s32 e1000_reset_hw_82580(struct e1000_hw *hw) s32 ret_val = E1000_SUCCESS; /* BH SW mailbox bit in SW_FW_SYNC */ u16 swmbsw_mask = E1000_SW_SYNCH_MB; - u32 ctrl; + u32 ctrl, status; bool global_device_reset = hw->dev_spec._82575.global_device_reset; DEBUGFUNC("e1000_reset_hw_82580"); @@ -2337,7 +2337,8 @@ STATIC s32 e1000_reset_hw_82580(struct e1000_hw *hw) } /* clear global device reset status bit */ - E1000_WRITE_REG(hw, E1000_STATUS, E1000_STAT_DEV_RST_SET); + status = E1000_READ_REG(hw, E1000_STATUS); + E1000_WRITE_REG(hw, E1000_STATUS, status | E1000_STAT_DEV_RST_SET); /* Clear any pending interrupt events. */ E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); -- 2.43.5