[PATCH v1 17/22] net/ixgbe/base: add missing QV defines

[Anatoly Burakov <anatoly.burakov@intel.com>]

From: Barbara Skobiej <barbara.skobiej@intel.com>

This patch adds missing QV defines:
- offset of ANVM data
- Immediate Field module pointer offset
- 2.5GBASE-T and 5GBASE-T physical layer types for X550

Signed-off-by: Barbara Skobiej <barbara.skobiej@intel.com>
Signed-off-by: Jan Sokolowski <jan.sokolowski@intel.com>
---
 drivers/net/ixgbe/base/ixgbe_type.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index 5bf03a1f62..9fed8b005c 100644
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -3072,6 +3072,7 @@ enum ixgbe_fdir_pballoc_type {
 #define FW_SHADOW_RAM_DUMP_LEN		0
 #define FW_DEFAULT_CHECKSUM		0xFF /* checksum always 0xFF */
 #define FW_NVM_DATA_OFFSET		3
+#define FW_ANVM_DATA_OFFSET		3
 #define FW_MAX_READ_BUFFER_SIZE		1024
 #define FW_DISABLE_RXEN_CMD		0xDE
 #define FW_DISABLE_RXEN_LEN		0x1
@@ -3143,6 +3144,8 @@ enum ixgbe_fdir_pballoc_type {
 #define FW_PHY_INFO_ID_HI_MASK		0xFFFF0000u
 #define FW_PHY_INFO_ID_LO_MASK		0x0000FFFFu
 
+#define IXGBE_SR_IMMEDIATE_VALUES_PTR		0x4E
+
 /* Host Interface Command Structures */
 
 #pragma pack(push, 1)
@@ -3446,6 +3449,8 @@ typedef u64 ixgbe_physical_layer;
 #define IXGBE_PHYSICAL_LAYER_1000BASE_SX	0x04000
 #define IXGBE_PHYSICAL_LAYER_10BASE_T		0x08000
 #define IXGBE_PHYSICAL_LAYER_2500BASE_KX	0x10000
+#define IXGBE_PHYSICAL_LAYER_2500BASE_T		0x20000
+#define IXGBE_PHYSICAL_LAYER_5000BASE_T		0x40000
 
 /* Flow Control Data Sheet defined values
  * Calculation and defines taken from 802.1bb Annex O
-- 
2.43.0