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From: Anatoly Burakov <anatoly.burakov@intel.com>
To: dev@dpdk.org
Cc: ian.stokes@intel.com,
bruce.richardson@intel.com
Subject: [PATCH v2 127/148] net/ice/base: make some switch-related functions
static
Date: Wed, 12 Jun 2024 16:02:01 +0100
Message-ID: <1f7944d01b8e6150230a2df5675126f67d12c346.1718204529.git.anatoly.burakov@intel.com>
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To better align with upstream release, remove some functions from
switch header and make them static instead.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
drivers/net/ice/base/ice_ptp_hw.c | 14 +++++++-------
drivers/net/ice/base/ice_ptp_hw.h | 16 ----------------
2 files changed, 7 insertions(+), 23 deletions(-)
diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index db0622e0fb..bca9e75744 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -3330,7 +3330,7 @@ ice_ptp_read_port_capture_e822(struct ice_hw *hw, u8 port, u64 *tx_ts,
* Note there is no equivalent of this operation on E810, as that device
* always handles all external PHYs internally.
*/
-int
+static int
ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port,
enum ice_ptp_tmr_cmd cmd, bool lock_sbq)
{
@@ -5093,8 +5093,8 @@ ice_ptp_prep_phy_adj_target_e810(struct ice_hw *hw, u32 target_time)
* Prepare the external PHYs connected to this device for a timer sync
* command.
*/
-int ice_ptp_port_cmd_e810(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
- bool lock_sbq)
+static int ice_ptp_port_cmd_e810(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
+ bool lock_sbq)
{
u32 val = ice_ptp_tmr_cmd_to_port_reg(hw, cmd);
int err;
@@ -5501,7 +5501,7 @@ ice_ptp_write_direct_phc_time_e830(struct ice_hw *hw, u64 time)
* Prepare the external PHYs connected to this device for a timer sync
* command.
*/
-int
+static int
ice_ptp_port_cmd_e830(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
bool lock_sbq)
{
@@ -5550,7 +5550,7 @@ ice_read_phy_tstamp_e830(struct ice_hw *hw, u8 lport, u8 idx, u64 *tstamp)
* @tstamp_ready: contents of the Tx memory status register
*
*/
-int
+static int
ice_get_phy_tx_tstamp_ready_e830(struct ice_hw *hw, u8 port, u64 *tstamp_ready)
{
u64 hi;
@@ -5696,8 +5696,8 @@ void ice_ptp_init_phy_model(struct ice_hw *hw)
* programming only a single port, instead use ice_ptp_one_port_cmd() to
* ensure non-modified ports get properly initialized to ICE_PTP_NOP.
*/
-int ice_ptp_write_port_cmd(struct ice_hw *hw, u8 port,
- enum ice_ptp_tmr_cmd cmd, bool lock_sbq)
+static int ice_ptp_write_port_cmd(struct ice_hw *hw, u8 port,
+ enum ice_ptp_tmr_cmd cmd, bool lock_sbq)
{
switch (hw->phy_model) {
case ICE_PHY_ETH56G:
diff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h
index 8030ebd0c1..90db99327c 100644
--- a/drivers/net/ice/base/ice_ptp_hw.h
+++ b/drivers/net/ice/base/ice_ptp_hw.h
@@ -195,12 +195,6 @@ int
ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq *clk_freq,
enum ice_clk_src *clk_src);
int
-ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port,
- enum ice_ptp_tmr_cmd cmd, bool lock_sbq);
-int
-ice_ptp_write_port_cmd(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd,
- bool lock_sbq);
-int
ice_cfg_cgu_pll_e825c(struct ice_hw *hw, enum ice_time_ref_freq *clk_freq,
enum ice_clk_src *clk_src);
int
@@ -213,16 +207,6 @@ ice_cfg_cgu_bypass_mux_e825c(struct ice_hw *hw, u8 port_num, bool clock_1588,
unsigned int ena);
int ice_cfg_synce_ethdiv_e825c(struct ice_hw *hw, u8 *divider);
-/* E8 Family */
-int
-ice_ptp_port_cmd_e830(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
- bool lock_sbq);
-int
-ice_ptp_port_cmd_e810(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
- bool lock_sbq);
-int
-ice_get_phy_tx_tstamp_ready_e830(struct ice_hw *hw, u8 port, u64 *tstamp_ready);
-
/**
* ice_e822_time_ref - Get the current TIME_REF from capabilities
* @hw: pointer to the HW structure
--
2.43.0