From: Thomas Monjalon <thomas.monjalon@6wind.com>
To: Didier Pallard <didier.pallard@6wind.com>
Cc: dev@dpdk.org
Subject: Re: [dpdk-dev] [PATCH v3] timer: add new rte_rdtsc_precise function
Date: Wed, 26 Feb 2014 10:39:56 +0100 [thread overview]
Message-ID: <201402261039.57202.thomas.monjalon@6wind.com> (raw)
In-Reply-To: <1392828368-8563-1-git-send-email-didier.pallard@6wind.com>
19/02/2014 17:46, Didier Pallard:
> According to Intel Developer's Manual:
>
> "The RDTSC instruction is not a serializing instruction. It does not
> necessarily wait until all previous instructions have been executed before
> reading the counter. Simi- larly, subsequent instructions may begin
> execution before the read operation is performed. If software requires
> RDTSC to be executed only after all previous instruc- tions have completed
> locally, it can either use RDTSCP (if the processor supports that
> instruction) or execute the sequence LFENCE;RDTSC."
>
> So add a rte_rdtsc_precise function that do a memory barrier before rdtsc
> to synchronize operations and ensure that the TSC read is done at the
> expected place.
>
> Signed-off-by: Didier Pallard <didier.pallard@6wind.com>
> ---
>
> Call rte_mb() and rte_rdtsc() rather than duplicating rte_rdtsc function.
> Use r/w memory barrier instead of lfence to serialize both load and stores.
Acked and applied.
Thanks to all
--
Thomas
prev parent reply other threads:[~2014-02-26 9:38 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1390562134-24720-1-git-send-email-didier.pallard@6wind.com>
2014-02-19 11:39 ` [dpdk-dev] [PATCH v2] timer: add lfence before TSC read Didier Pallard
2014-02-19 16:46 ` [dpdk-dev] [PATCH v3] timer: add new rte_rdtsc_precise function Didier Pallard
2014-02-26 9:39 ` Thomas Monjalon [this message]
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