From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 09858B3B0 for ; Thu, 18 Sep 2014 17:37:00 +0200 (CEST) Received: from azsmga001.ch.intel.com ([10.2.17.19]) by fmsmga102.fm.intel.com with ESMTP; 18 Sep 2014 08:42:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,548,1406617200"; d="scan'208";a="478460976" Received: from bricha3-mobl.ger.corp.intel.com (HELO bricha3-mobl.ir.intel.com) ([10.237.220.58]) by azsmga001.ch.intel.com with SMTP; 18 Sep 2014 08:42:37 -0700 Received: by bricha3-mobl.ir.intel.com (sSMTP sendmail emulation); Thu, 18 Sep 2014 16:42:36 +0001 Date: Thu, 18 Sep 2014 16:42:36 +0100 From: Bruce Richardson To: Neil Horman Message-ID: <20140918154235.GB12120@BRICHA3-MOBL> References: <1410948102-12740-1-git-send-email-bruce.richardson@intel.com> <1410948102-12740-3-git-send-email-bruce.richardson@intel.com> <20140917152103.GE4213@localhost.localdomain> <59AF69C657FD0841A61C55336867B5B0343F2EEA@IRSMSX103.ger.corp.intel.com> <20140917175936.GA13492@hmsreliant.think-freely.org> <20140918133613.GA7208@BRICHA3-MOBL> <20140918152930.GG20389@hmsreliant.think-freely.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20140918152930.GG20389@hmsreliant.think-freely.org> Organization: Intel Shannon Ltd. User-Agent: Mutt/1.5.22 (2013-10-16) Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [PATCH 2/5] ixgbe: add prefetch to improve slow-path tx perf X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Sep 2014 15:37:01 -0000 On Thu, Sep 18, 2014 at 11:29:30AM -0400, Neil Horman wrote: > On Thu, Sep 18, 2014 at 02:36:13PM +0100, Bruce Richardson wrote: > > On Wed, Sep 17, 2014 at 01:59:36PM -0400, Neil Horman wrote: > > > On Wed, Sep 17, 2014 at 03:35:19PM +0000, Richardson, Bruce wrote: > > > > > > > > > -----Original Message----- > > > > > From: Neil Horman [mailto:nhorman@tuxdriver.com] > > > > > Sent: Wednesday, September 17, 2014 4:21 PM > > > > > To: Richardson, Bruce > > > > > Cc: dev@dpdk.org > > > > > Subject: Re: [dpdk-dev] [PATCH 2/5] ixgbe: add prefetch to improve slow-path tx > > > > > perf > > > > > > > > > > On Wed, Sep 17, 2014 at 11:01:39AM +0100, Bruce Richardson wrote: > > > > > > Make a small improvement to slow path TX performance by adding in a > > > > > > prefetch for the second mbuf cache line. > > > > > > Also move assignment of l2/l3 length values only when needed. > > > > > > > > > > > > Signed-off-by: Bruce Richardson > > > > > > --- > > > > > > lib/librte_pmd_ixgbe/ixgbe_rxtx.c | 12 +++++++----- > > > > > > 1 file changed, 7 insertions(+), 5 deletions(-) > > > > > > > > > > > > diff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c > > > > > b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c > > > > > > index 6f702b3..c0bb49f 100644 > > > > > > --- a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c > > > > > > +++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c > > > > > > @@ -565,25 +565,26 @@ ixgbe_xmit_pkts(void *tx_queue, struct rte_mbuf > > > > > **tx_pkts, > > > > > > ixgbe_xmit_cleanup(txq); > > > > > > } > > > > > > > > > > > > + rte_prefetch0(&txe->mbuf->pool); > > > > > > + > > > > > > > > > > Can you explain what all of these prefetches are doing? It looks to me like > > > > > they're just fetching the first caheline of the mempool structure, which it > > > > > appears amounts to the pools name. I don't see that having any use here. > > > > > > > > > This does make a decent enough performance difference in my tests (the amount varies depending on the RX path being used by testpmd). > > > > > > > > What I've done with the prefetches is two-fold: > > > > 1) changed it from prefetching the mbuf (first cache line) to prefetching the mbuf pool pointer (second cache line) so that when we go to access the pool pointer to free transmitted mbufs we don't get a cache miss. When clearing the ring and freeing mbufs, the pool pointer is the only mbuf field used, so we don't need that first cache line. > > > ok, this makes some sense, but you're not guaranteed to either have that > > > prefetch be needed, nor are you certain it will still be in cache by the time > > > you get to the free call. Seems like it might be preferable to prefecth the > > > data pointed to by tx_pkt, as you're sure to use that every loop iteration. > > > > The vast majority of the times the prefetch is necessary, and it does help > > performance doing things this way. If the prefetch is not necessary, it's > > just one extra instruction, while, if it is needed, having the prefetch > > occur 20 cycles before access (picking an arbitrary value) means that we > > have cut down the time it takes to pull the data from cache when it is > > needed by 20 cycles. > I understand how prefetch works. What I'm concerned about is its overuse, and > its tendency to frequently need re-calibration (though I admit I missed the & > operator in the patch, and thought you were prefetching the contents of the > struct, not the pointer value itself). As you say, if the pool pointer is > almost certain to be used, then it may well make sense to prefetch the data, but > in doing so, you potentially evict something that you were about to use, so > you're not doing yourself any favors. I understand that you've validated this > experimentally, and so it works, right now. I just like to be very careful > about how prefetch happens, as it can easily (and sliently) start hurting far > more than it helps. > > > As for the value pointed to by tx_pkt, since this is a > > packet the app has just been working on, it's almost certainly already in > > l1/l2 cache. > > > Not sure I follow you here. tx_pkts is an array of mbufs passed to the pmd from > rte_eth_tx_burts, which in turn is called by the application. I don't see any > reasonable guarantee that any of those packets have been touch in sufficiently > recent history that they are likely to be in cache. It seems like, if you do > want to do prefetching, interrotagting nb_tx and doing a prefetch of an > approriate stride to fill multiple cachelines with successive mbuf headers might > provide superior performance. > Neil > Prefetching the mbuf is probably best left to the application. For all our sample applications used for benchmarking, and almost certainly the vast majority of all our example applications, the packet being transmitted is already in cache on the core itself. Adding a prefetch to the tx function I would expect to see a performance decrease in both testpmd and l3fwd apps. I would be useful for apps where the packets are passed from one core to another core which does no processing of them before transmitting them - but in that case, it's better to have the TX thread of the app do the prefetch rather than forcing it in the driver and reduce the performance of those apps that have the packets already in cache. The prefetch added by the patch under discussion doesn't suffer from this issue as the data being prefetched is for the mbuf that was previously transmitted some time previously, and the tx function has fully looped back around the TX ring to get to it again. /Bruce