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From: Matthew Hall <mhall@mhcomputing.net>
To: Jeff Shaw <jeffrey.b.shaw@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] DPDK Demos at IDF conference using DDIO
Date: Thu, 25 Sep 2014 12:18:20 -0700	[thread overview]
Message-ID: <20140925191820.GA3117@mhcomputing.net> (raw)
In-Reply-To: <20140925161124.GA7609@plxv1142.pdx.intel.com>

On Thu, Sep 25, 2014 at 09:11:24AM -0700, Jeff Shaw wrote:
> Intel(R) Data Direct I/O Technology (Intel(R) DDIO) is a feature introduced 
> with the Intel(R) Xeon(R) processor E5 family.
> 
> It has been around for several years and is available at least on all Xeon 
> E5 processors. DDIO is part of the platform, so any DPDK version can take 
> advantage of the feature.  There are several papers and videos available on 
> the Internet that can provide more details.

One difficulty I run into with a lot of these Intel accelerations... each one 
is described as an atomic entity independent of all the other possible 
accelerations. Nobody explains how to take all of them together to make a 
complete high-speend low-latency packet processing solution from L1-L7.

It'd be nice to see an architecture level view of DPDK, along with the 
accelerations one could / should apply at each level, so there's some kind of 
checklist you can follow to be sure you used everything you should where you 
should. Otherwise you'll miss some stuff and waste the features you paid for.

Also, how is DDIO different from the previous DCA accelerations?

Thanks,
Matthew.

  reply	other threads:[~2014-09-25 19:12 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-25 15:19 Anjali Kulkarni
2014-09-25 16:11 ` Jeff Shaw
2014-09-25 19:18   ` Matthew Hall [this message]
2014-09-25 19:27     ` Anjali Kulkarni
2014-09-25 20:09       ` Matthew Hall
2014-09-28  7:08         ` Alex Markuze
2014-09-28 19:22           ` Jayakumar, Muthurajan

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