From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 9D2485323 for ; Tue, 18 Nov 2014 16:55:09 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 18 Nov 2014 08:04:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,410,1413270000"; d="scan'208";a="639050764" Received: from bricha3-mobl3.ger.corp.intel.com ([10.243.20.33]) by orsmga002.jf.intel.com with SMTP; 18 Nov 2014 08:04:26 -0800 Received: by (sSMTP sendmail emulation); Tue, 18 Nov 2014 16:04:26 +0025 Date: Tue, 18 Nov 2014 16:04:26 +0000 From: Bruce Richardson To: Neil Horman Message-ID: <20141118160425.GA5840@bricha3-MOBL3> References: <1409724351-23786-1-git-send-email-e_zhumabekov@sts.kz> <20141118144138.GB32375@hmsreliant.think-freely.org> <546B607B.9030808@sts.kz> <20141118160005.GC32375@hmsreliant.think-freely.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20141118160005.GC32375@hmsreliant.think-freely.org> Organization: Intel Shannon Ltd. User-Agent: Mutt/1.5.23 (2014-03-12) Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [PATCH v4 3/5] hash: add fallback to software CRC32 implementation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Nov 2014 15:55:10 -0000 On Tue, Nov 18, 2014 at 11:00:05AM -0500, Neil Horman wrote: > On Tue, Nov 18, 2014 at 09:06:35PM +0600, Yerden Zhumabekov wrote: > > > > 18.11.2014 20:41, Neil Horman пишет: > > > On Tue, Nov 18, 2014 at 08:03:40PM +0600, Yerden Zhumabekov wrote: > > >> Initially, SSE4.2 support is detected via CPUID instruction. > > >> > > >> Added rte_hash_crc_set_alg() function to detect and set CRC32 > > >> implementation if necessary. SSE4.2 is allowed by default. If it's > > >> not available, fall back to sw implementation. > > >> > > >> Best available algorithm is detected upon application startup > > >> through the constructor function rte_hash_crc_try_sse442(). > > >> > > >> Signed-off-by: Yerden Zhumabekov > > >> --- > > >> lib/librte_hash/rte_hash_crc.h | 53 ++++++++++++++++++++++++++++++++++++++-- > > >> 1 file changed, 51 insertions(+), 2 deletions(-) > > >> > > >> diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h > > >> index 15f687a..332ed99 100644 > > >> --- a/lib/librte_hash/rte_hash_crc.h > > >> +++ b/lib/librte_hash/rte_hash_crc.h > > >> @@ -45,7 +45,11 @@ extern "C" { > > >> #endif > > >> > > >> #include > > >> +#ifdef RTE_MACHINE_CPUFLAG_SSE4_2 > > >> #include > > >> +#endif > > >> +#include > > >> +#include > > >> > > >> /* Lookup tables for software implementation of CRC32C */ > > >> static uint32_t crc32c_tables[8][256] = {{ > > >> @@ -363,8 +367,41 @@ crc32c_2words(uint64_t data, uint32_t init_val) > > >> return crc; > > >> } > > >> > > >> +enum crc32_alg_t { > > >> + CRC32_SW = 0, > > >> + CRC32_SSE42 > > >> +}; > > >> + > > >> +static enum crc32_alg_t crc32_alg; > > >> + > > >> +/** > > >> + * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash > > >> + * calculation. > > >> + * > > >> + * @param flag > > >> + * unsigned integer flag > > >> + * - (CRC32_SW) Don't use SSE4.2 intrinsics > > >> + * - (CRC32_SSE42) Use SSE4.2 intrinsics if available, set by default > > >> + */ > > >> +static inline void > > >> +rte_hash_crc_set_alg(enum crc32_alg_t alg) > > >> +{ > > >> + int sse42_supp = rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_2); > > >> + enum crc32_alg_t alg_supp = sse42_supp ? CRC32_SSE42 : CRC32_SW; > > >> + crc32_alg = (alg == CRC32_SSE42) ? alg_supp : CRC32_SW; > > >> +} > > >> + > > >> +/* Best available algorithm is detected via CPUID instruction */ > > >> +static inline void __attribute__((constructor)) > > >> +rte_hash_crc_try_sse42(void) > > >> +{ > > >> + rte_hash_crc_set_alg(CRC32_SSE42); > > >> +} > > >> + > > >> /** > > >> * Use single crc32 instruction to perform a hash on a 4 byte value. > > >> + * Fall back to software crc32 implementation in case SSE4.2 is > > >> + * not supported > > >> * > > >> * @param data > > >> * Data to perform hash on. > > >> @@ -376,11 +413,18 @@ crc32c_2words(uint64_t data, uint32_t init_val) > > >> static inline uint32_t > > >> rte_hash_crc_4byte(uint32_t data, uint32_t init_val) > > >> { > > >> - return _mm_crc32_u32(init_val, data); > > >> +#ifdef RTE_MACHINE_CPUFLAG_SSE4_2 > > >> + if (likely(crc32_alg == CRC32_SSE42)) > > >> + return _mm_crc32_u32(init_val, data); > > >> +#endif > > > you don't really need these ifdefs here anymore given that you have a > > > constructor to do the algorithm selection. In fact you need to remove them, in > > > the event you build on a system that doesn't support SSE42, but run on a system > > > that does. > > > > Originally, I thought so as well. I wrote the code without these ifdefs, > > but it didn't compile on my machine which doesn't support SSE4.2. Error > > was triggered by nmmintrin.h which has a check for respective GCC > > extension. So I think these ifdefs are indeed required. > > > You need to edit the makefile so that the compiler gets passed the option > -msse42. That way it will know to emit sse42 instructions. It will also allow > you to remove the ifdef from the include file > Neil > Question: does that then limit the compiler to emitting sse42 instructions? If, for instance, the rest of DPDK is being compiled for a target supporting AVX2, does that flag then prevent the compiler from auto-vectorising using SSE? /Bruce