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From: Stephen Hemminger <stephen@networkplumber.org>
To: "Dong.Wang" <dong.wang.pro@hotmail.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH] ixgbe:Add write memory barrier for recv pkts.
Date: Wed, 15 Apr 2015 09:06:42 -0700	[thread overview]
Message-ID: <20150415090642.0137f4c9@urahara> (raw)
In-Reply-To: <BLU436-SMTP22AEE6E7C0129FF42E71B2BFE50@phx.gbl>

On Wed, 15 Apr 2015 21:46:27 +0800
Dong.Wang <dong.wang.pro@hotmail.com> wrote:

> Yes, current implementation works well with IA, and the transmit packets 
> function's rte_wmb() is also unneccessary.
> 
> But there are two reasons for adding rte_wmb() in recv pkts function:
> 1) The memory barrier in recv pkts function and xmit pkts function are 
> inconsistent, rte_wmb() should be added to recv pkts function or be 
> removed from xmit pkts function.
> 2) DPDK will support PowerPC processor (Other developers are working on 
> it), I check the memory ordering of PowerPC, there was no mention of 
> store-store instruction's principle in MPC8544 Reference Manual, only 
> said it is weak memory ordering.
> 
> So, I think it is neccessary to add rte_wmb() to recv pkts function.
> 
> Dong

If PowerPC requires additional memory barriers then it should
introduce a new generic set of memory barrier macros that are no-ops
on other architectures.

Please don't penalize x86 for places where other CPU's have
weaker consistency.

  reply	other threads:[~2015-04-15 16:06 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-11 15:33 WangDong
2015-04-14 22:50 ` Ananyev, Konstantin
2015-04-15 13:46   ` Dong.Wang
2015-04-15 16:06     ` Stephen Hemminger [this message]
2015-04-16 11:29       ` Wang Dong
2015-04-15 22:52     ` Ananyev, Konstantin
2015-04-16 11:36       ` Wang Dong
2015-04-16 15:14         ` Ananyev, Konstantin
2015-04-16 15:55           ` David Marchand
2015-05-05 15:52           ` Dong Wang
2015-04-16 15:55 Dong Wang
2015-04-16 15:58 Dong Wang

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