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From: Matthew Hall <mhall@mhcomputing.net>
To: Bruce Richardson <bruce.richardson@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] DCA
Date: Tue, 21 Apr 2015 10:44:54 -0700	[thread overview]
Message-ID: <20150421174454.GA1172@mhcomputing.net> (raw)
In-Reply-To: <20150421092748.GB5360@bricha3-MOBL3>

On Tue, Apr 21, 2015 at 10:27:48AM +0100, Bruce Richardson wrote:
> Can you perhaps comment on the use-case where you find this binding 
> limiting? Modern platforms have multiple NUMA nodes, but they also generally 
> have PCI slots connected to those multiple NUMA nodes also, so that you can 
> have your NIC ports similarly NUMA partitionned?

Hi Bruce,

I was wondering if you have tried to do this on COTS (commerical 
off-the-shelf) hardware before. What I found each time I tried it was that 
PCIe slots are not very evenly distributed across the NUMA nodes unlike what 
you'd expect.

Sometimes the PCIe lanes on CPU 0 get partly used up by Super IO or other 
integrated peripherals. Other times the motherboards give you 2 x8 when you 
needed 1 x16 or they give you a bundh of x4 when you needed x8, etc.

It's actually pretty difficult to find the mapping, for one, and even when you 
do, even harder to get the right slots for your cards and so on. In the ixgbe 
kernel driver you'll sometimes get some cryptic debug prints when it's been 
munged and performance will suffer. But in the ixgbe PMD driver you're on your 
own mostly.

Matthew.

  parent reply	other threads:[~2015-04-21 17:46 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-20 10:07 Vlad Zolotarov
2015-04-20 10:50 ` Bruce Richardson
2015-04-21  8:51   ` Vlad Zolotarov
2015-04-21  9:27     ` Bruce Richardson
2015-04-21  9:47       ` Vlad Zolotarov
2015-04-21 17:44       ` Matthew Hall [this message]
2015-04-22  9:10         ` Bruce Richardson

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