From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-000f0801.pphosted.com (mx0b-000f0801.pphosted.com [67.231.152.113]) by dpdk.org (Postfix) with ESMTP id AB555FE5 for ; Tue, 5 May 2015 20:36:13 +0200 (CEST) Received: from pps.filterd (m0000700.ppops.net [127.0.0.1]) by mx0b-000f0801.pphosted.com (8.14.7/8.14.7) with SMTP id t45IV1wo007736; Tue, 5 May 2015 11:36:13 -0700 Received: from hq1wp-exchub01.corp.brocade.com ([144.49.131.13]) by mx0b-000f0801.pphosted.com with ESMTP id 1u6r6qa5u0-2 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NOT); Tue, 05 May 2015 11:36:13 -0700 Received: from HQ1WP-EXMB12.corp.brocade.com (10.70.20.186) by HQ1WP-EXCHUB01.corp.brocade.com (10.70.36.99) with Microsoft SMTP Server (TLS) id 14.3.123.3; Tue, 5 May 2015 11:36:08 -0700 Received: from urahara (10.72.48.181) by HQ1WP-EXMB12.corp.brocade.com (10.70.20.186) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Tue, 5 May 2015 11:36:07 -0700 Date: Tue, 5 May 2015 11:36:11 -0700 From: Stephen Hemminger To: Cunming Liang Message-ID: <20150505113611.1359e2d8@urahara> In-Reply-To: <1430804386-28949-9-git-send-email-cunming.liang@intel.com> References: <1425012976-10173-1-git-send-email-cunming.liang@intel.com> <1430804386-28949-1-git-send-email-cunming.liang@intel.com> <1430804386-28949-9-git-send-email-cunming.liang@intel.com> Organization: Brocade MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.72.48.181] X-ClientProxiedBy: hq1wp-excas12.corp.brocade.com (10.70.38.22) To HQ1WP-EXMB12.corp.brocade.com (10.70.20.186) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.14.151, 1.0.33, 0.0.0000 definitions=2015-05-05_06:2015-05-05,2015-05-05,1970-01-01 signatures=0 X-Proofpoint-Spam-Details: rule=notspam policy=default score=23 spamscore=23 suspectscore=1 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=7.0.1-1402240000 definitions=main-1505050225 X-Mailman-Approved-At: Tue, 05 May 2015 22:05:09 +0200 Cc: dev@dpdk.org Subject: Re: [dpdk-dev] [PATCH v7 08/10] ixgbe: enable rx queue interrupts for both PF and VF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 05 May 2015 18:36:14 -0000 On Tue, 5 May 2015 13:39:44 +0800 Cunming Liang wrote: > > + /* set max interrupt vfio request */ > + if (pci_dev->intr_handle.vec_en) { > + pci_dev->intr_handle.max_intr = hw->mac.max_rx_queues + > + IXGBEVF_MAX_OTHER_INTR; > + pci_dev->intr_handle.intr_vec = > + rte_zmalloc("intr_vec", > + hw->mac.max_rx_queues * sizeof(int), 0); > + Since MSI-X vectors are limited on many hardware platforms, this whole API should be changed so that max_intr is based on number of rx_queues actually used by the application. That means the setup needs to move from init to configure.