From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pd0-f181.google.com (mail-pd0-f181.google.com [209.85.192.181]) by dpdk.org (Postfix) with ESMTP id 58A6B37AA for ; Thu, 28 May 2015 23:25:46 +0200 (CEST) Received: by pdfh10 with SMTP id h10so50338220pdf.3 for ; Thu, 28 May 2015 14:25:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to :references:mime-version:content-type:content-transfer-encoding; bh=iaNNei5pXZM35/n54yLCloY5S/NTYFbVLOxcmx7N4VA=; b=R2HYx9JEsO5YXGn+yjDmE/glYQV8TJuxUEsVihLILsKoDwFlR/gxDXPx5mY0LqoFuM u+8Xecs2K3hjMcmK31Mw1yD+64X9RKh26bDMRDy0LpybMTLy4xhscR5PZd219usPOVNU 8bn8EENMNwHN8lIl42aX5dQkdR3EAeCLLYVS/bbhMhis2VZZuybYa9b2eaZ6IAUlbquG 826wUyvaf8fXD3P2S0khAMBPHF82HbJVvbyLhEfd87owH3aiFG3GLLNOU7wEKNmLUgoi WCH+oLJr9cs2kl/XREk++OotFMZNan0RVW4RKXzpQ9rkLEeR0j42atKutq7R75xuiOq/ BvKQ== X-Gm-Message-State: ALoCoQkBmZDdTsGWTluvCSzDwNeiBj+5cxUyv46w6PYNZFM/3QnfnPI6OU5PBLJxSteMRsy43ewn X-Received: by 10.66.154.111 with SMTP id vn15mr9058711pab.108.1432848345513; Thu, 28 May 2015 14:25:45 -0700 (PDT) Received: from urahara (static-50-53-82-155.bvtn.or.frontiernet.net. [50.53.82.155]) by mx.google.com with ESMTPSA id af5sm3319599pbc.90.2015.05.28.14.25.44 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 May 2015 14:25:45 -0700 (PDT) Date: Thu, 28 May 2015 14:25:48 -0700 From: Stephen Hemminger To: Cunming Liang Message-ID: <20150528142548.788ab5bb@urahara> In-Reply-To: <1430804386-28949-10-git-send-email-cunming.liang@intel.com> References: <1425012976-10173-1-git-send-email-cunming.liang@intel.com> <1430804386-28949-1-git-send-email-cunming.liang@intel.com> <1430804386-28949-10-git-send-email-cunming.liang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: dev@dpdk.org Subject: Re: [dpdk-dev] [PATCH v7 09/10] igb: enable rx queue interrupts for PF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 28 May 2015 21:25:46 -0000 On Tue, 5 May 2015 13:39:45 +0800 Cunming Liang wrote: > + pci_dev->intr_handle.intr_vec = > + rte_zmalloc("intr_vec", > + dev_info.max_rx_queues * sizeof(int), 0); > + This and other drivers should be using rte_zmalloc_socket to ensure that the intr_vec table is allocated on the same NUMA node as the hardware.