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Date: Wed, 3 Jun 2015 11:36:30 -0700
From: Cyril Chemparathy <cchemparathy@ezchip.com>
To: Dax Rawal <daxayrawal@gmail.com>
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Subject: Re: [dpdk-dev] mempool with custom alignment
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On Wed, 3 Jun 2015 11:30:17 -0700
Hi Dax,

Dax Rawal <daxayrawal@gmail.com> wrote:

> Hi,
> I use mempool APIs to allocate DMA-able descriptor ring and buffers
> so that I get both physical and virtual addresses of allocated
> memory. I buffers I get from the mempool APIs are 64 byte aligned. My
> requirement is 256byte alignment. How to achieve this? mempool APIs
> do not seem to take alignment parameters.
> 

I have a patch that allows configuration override of mempool element
alignment to allow for larger alignment limits (e.g. 128B on the
TILE-Gx platform, 256B on yours). Would that suffice? If so, I'd be
happy to post this patch on the mailing list.

Thanks
-- Cyril.