* [dpdk-dev] [PATCH] ixgbe: prefetch cacheline after pointer becomes valid
@ 2015-09-25 0:23 Zoltan Kiss
2015-09-25 11:47 ` Mcnamara, John
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Zoltan Kiss @ 2015-09-25 0:23 UTC (permalink / raw)
To: dev
At the original point the rx_pkts[pos( + n)] pointers are not initialized, so
the code is prefetching random data.
Signed-off-by: Zoltan Kiss <zoltan.kiss@linaro.org>
diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec.c b/drivers/net/ixgbe/ixgbe_rxtx_vec.c
index 3c6d8c5..ccd93c7 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx_vec.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx_vec.c
@@ -284,13 +284,6 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts,
__m128i zero, staterr, sterr_tmp1, sterr_tmp2;
__m128i mbp1, mbp2; /* two mbuf pointer in one XMM reg. */
- if (split_packet) {
- rte_prefetch0(&rx_pkts[pos]->cacheline1);
- rte_prefetch0(&rx_pkts[pos + 1]->cacheline1);
- rte_prefetch0(&rx_pkts[pos + 2]->cacheline1);
- rte_prefetch0(&rx_pkts[pos + 3]->cacheline1);
- }
-
/* B.1 load 1 mbuf point */
mbp1 = _mm_loadu_si128((__m128i *)&sw_ring[pos]);
@@ -312,6 +305,13 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts,
/* B.2 copy 2 mbuf point into rx_pkts */
_mm_storeu_si128((__m128i *)&rx_pkts[pos+2], mbp2);
+ if (split_packet) {
+ rte_prefetch0(&rx_pkts[pos]->cacheline1);
+ rte_prefetch0(&rx_pkts[pos + 1]->cacheline1);
+ rte_prefetch0(&rx_pkts[pos + 2]->cacheline1);
+ rte_prefetch0(&rx_pkts[pos + 3]->cacheline1);
+ }
+
/* A* mask out 0~3 bits RSS type */
descs[3] = _mm_and_si128(descs0[3], desc_mask);
descs[2] = _mm_and_si128(descs0[2], desc_mask);
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [dpdk-dev] [PATCH] ixgbe: prefetch cacheline after pointer becomes valid
2015-09-25 0:23 [dpdk-dev] [PATCH] ixgbe: prefetch cacheline after pointer becomes valid Zoltan Kiss
@ 2015-09-25 11:47 ` Mcnamara, John
2015-09-25 17:42 ` Zoltan Kiss
2015-09-25 15:22 ` Bruce Richardson
2015-09-25 17:44 ` [dpdk-dev] [PATCH v2] " Zoltan Kiss
2 siblings, 1 reply; 7+ messages in thread
From: Mcnamara, John @ 2015-09-25 11:47 UTC (permalink / raw)
To: Zoltan Kiss, dev
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Zoltan Kiss
> Sent: Friday, September 25, 2015 1:23 AM
> To: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH] ixgbe: prefetch cacheline after pointer
> becomes valid
>
> + if (split_packet) {
> + rte_prefetch0(&rx_pkts[pos]->cacheline1);
> + rte_prefetch0(&rx_pkts[pos + 1]->cacheline1);
> + rte_prefetch0(&rx_pkts[pos + 2]->cacheline1);
> + rte_prefetch0(&rx_pkts[pos + 3]->cacheline1);
> + }
> +
> /* A* mask out 0~3 bits RSS type */
> descs[3] = _mm_and_si128(descs0[3], desc_mask);
> descs[2] = _mm_and_si128(descs0[2], desc_mask);
Hi,
This patch doesn't apply cleanly. It looks like all the tabs have been replaced with spaces.
John.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [dpdk-dev] [PATCH] ixgbe: prefetch cacheline after pointer becomes valid
2015-09-25 11:47 ` Mcnamara, John
@ 2015-09-25 17:42 ` Zoltan Kiss
0 siblings, 0 replies; 7+ messages in thread
From: Zoltan Kiss @ 2015-09-25 17:42 UTC (permalink / raw)
To: Mcnamara, John, dev
On 25/09/15 04:47, Mcnamara, John wrote:
>> -----Original Message-----
>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Zoltan Kiss
>> Sent: Friday, September 25, 2015 1:23 AM
>> To: dev@dpdk.org
>> Subject: [dpdk-dev] [PATCH] ixgbe: prefetch cacheline after pointer
>> becomes valid
>>
>> + if (split_packet) {
>> + rte_prefetch0(&rx_pkts[pos]->cacheline1);
>> + rte_prefetch0(&rx_pkts[pos + 1]->cacheline1);
>> + rte_prefetch0(&rx_pkts[pos + 2]->cacheline1);
>> + rte_prefetch0(&rx_pkts[pos + 3]->cacheline1);
>> + }
>> +
>> /* A* mask out 0~3 bits RSS type */
>> descs[3] = _mm_and_si128(descs0[3], desc_mask);
>> descs[2] = _mm_and_si128(descs0[2], desc_mask);
> Hi,
>
> This patch doesn't apply cleanly. It looks like all the tabs have been replaced with spaces.
Sorry, my bad, I'll resend
>
> John.
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [dpdk-dev] [PATCH] ixgbe: prefetch cacheline after pointer becomes valid
2015-09-25 0:23 [dpdk-dev] [PATCH] ixgbe: prefetch cacheline after pointer becomes valid Zoltan Kiss
2015-09-25 11:47 ` Mcnamara, John
@ 2015-09-25 15:22 ` Bruce Richardson
2015-09-25 17:44 ` [dpdk-dev] [PATCH v2] " Zoltan Kiss
2 siblings, 0 replies; 7+ messages in thread
From: Bruce Richardson @ 2015-09-25 15:22 UTC (permalink / raw)
To: Zoltan Kiss; +Cc: dev
On Thu, Sep 24, 2015 at 05:23:26PM -0700, Zoltan Kiss wrote:
> At the original point the rx_pkts[pos( + n)] pointers are not initialized, so
> the code is prefetching random data.
>
> Signed-off-by: Zoltan Kiss <zoltan.kiss@linaro.org>
>
Apart from the whitespace issues pointed out by John, this fix looks ok and
testing shows no performance impact (as expected).
/Bruce
^ permalink raw reply [flat|nested] 7+ messages in thread
* [dpdk-dev] [PATCH v2] ixgbe: prefetch cacheline after pointer becomes valid
2015-09-25 0:23 [dpdk-dev] [PATCH] ixgbe: prefetch cacheline after pointer becomes valid Zoltan Kiss
2015-09-25 11:47 ` Mcnamara, John
2015-09-25 15:22 ` Bruce Richardson
@ 2015-09-25 17:44 ` Zoltan Kiss
2015-09-28 9:53 ` Bruce Richardson
2 siblings, 1 reply; 7+ messages in thread
From: Zoltan Kiss @ 2015-09-25 17:44 UTC (permalink / raw)
To: dev
At the original point the rx_pkts[pos( + n)] pointers are not initialized, so
the code is prefetching random data.
Signed-off-by: Zoltan Kiss <zoltan.kiss@linaro.org>
---
v2: fixing tabs
diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec.c b/drivers/net/ixgbe/ixgbe_rxtx_vec.c
index 3c6d8c5..ccd93c7 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx_vec.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx_vec.c
@@ -284,13 +284,6 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts,
__m128i zero, staterr, sterr_tmp1, sterr_tmp2;
__m128i mbp1, mbp2; /* two mbuf pointer in one XMM reg. */
- if (split_packet) {
- rte_prefetch0(&rx_pkts[pos]->cacheline1);
- rte_prefetch0(&rx_pkts[pos + 1]->cacheline1);
- rte_prefetch0(&rx_pkts[pos + 2]->cacheline1);
- rte_prefetch0(&rx_pkts[pos + 3]->cacheline1);
- }
-
/* B.1 load 1 mbuf point */
mbp1 = _mm_loadu_si128((__m128i *)&sw_ring[pos]);
@@ -312,6 +305,13 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts,
/* B.2 copy 2 mbuf point into rx_pkts */
_mm_storeu_si128((__m128i *)&rx_pkts[pos+2], mbp2);
+ if (split_packet) {
+ rte_prefetch0(&rx_pkts[pos]->cacheline1);
+ rte_prefetch0(&rx_pkts[pos + 1]->cacheline1);
+ rte_prefetch0(&rx_pkts[pos + 2]->cacheline1);
+ rte_prefetch0(&rx_pkts[pos + 3]->cacheline1);
+ }
+
/* A* mask out 0~3 bits RSS type */
descs[3] = _mm_and_si128(descs0[3], desc_mask);
descs[2] = _mm_and_si128(descs0[2], desc_mask);
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [dpdk-dev] [PATCH v2] ixgbe: prefetch cacheline after pointer becomes valid
2015-09-25 17:44 ` [dpdk-dev] [PATCH v2] " Zoltan Kiss
@ 2015-09-28 9:53 ` Bruce Richardson
2015-10-28 16:19 ` Thomas Monjalon
0 siblings, 1 reply; 7+ messages in thread
From: Bruce Richardson @ 2015-09-28 9:53 UTC (permalink / raw)
To: Zoltan Kiss; +Cc: dev
On Fri, Sep 25, 2015 at 10:44:51AM -0700, Zoltan Kiss wrote:
> At the original point the rx_pkts[pos( + n)] pointers are not initialized, so
> the code is prefetching random data.
>
> Signed-off-by: Zoltan Kiss <zoltan.kiss@linaro.org>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [dpdk-dev] [PATCH v2] ixgbe: prefetch cacheline after pointer becomes valid
2015-09-28 9:53 ` Bruce Richardson
@ 2015-10-28 16:19 ` Thomas Monjalon
0 siblings, 0 replies; 7+ messages in thread
From: Thomas Monjalon @ 2015-10-28 16:19 UTC (permalink / raw)
To: Zoltan Kiss; +Cc: dev
2015-09-28 10:53, Bruce Richardson:
> On Fri, Sep 25, 2015 at 10:44:51AM -0700, Zoltan Kiss wrote:
> > At the original point the rx_pkts[pos( + n)] pointers are not initialized, so
> > the code is prefetching random data.
> >
> > Signed-off-by: Zoltan Kiss <zoltan.kiss@linaro.org>
>
> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Applied, thanks
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2015-10-28 16:20 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
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2015-09-25 0:23 [dpdk-dev] [PATCH] ixgbe: prefetch cacheline after pointer becomes valid Zoltan Kiss
2015-09-25 11:47 ` Mcnamara, John
2015-09-25 17:42 ` Zoltan Kiss
2015-09-25 15:22 ` Bruce Richardson
2015-09-25 17:44 ` [dpdk-dev] [PATCH v2] " Zoltan Kiss
2015-09-28 9:53 ` Bruce Richardson
2015-10-28 16:19 ` Thomas Monjalon
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