From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 8E6CE8E7E for ; Mon, 19 Oct 2015 11:34:39 +0200 (CEST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga102.fm.intel.com with ESMTP; 19 Oct 2015 02:34:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,701,1437462000"; d="scan'208";a="796779573" Received: from bricha3-mobl3.ger.corp.intel.com ([10.237.208.63]) by orsmga001.jf.intel.com with SMTP; 19 Oct 2015 02:34:33 -0700 Received: by (sSMTP sendmail emulation); Mon, 19 Oct 2015 10:34:31 +0025 Date: Mon, 19 Oct 2015 10:34:31 +0100 From: Bruce Richardson To: Moon-Sang Lee Message-ID: <20151019093431.GA11324@bricha3-MOBL3> References: <20151016134320.GE9980@bricha3-MOBL3> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Shannon Ltd. User-Agent: Mutt/1.5.23 (2014-03-12) Cc: dev@dpdk.org Subject: Re: [dpdk-dev] [Q] l2fwd in examples directory X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Oct 2015 09:34:40 -0000 On Mon, Oct 19, 2015 at 04:39:41PM +0900, Moon-Sang Lee wrote: > My NUT has Xeon L5520 that is based on Nehalem microarchitecture. > Does Nehalem supports PCIe interface on chipset? For nehalem, I think having the PCI numa node reported as -1 is normal, as it's not directly connected to the physical sockets, but connected to the chipset instead. For later generation CPU Xeon platforms, your PCI slots are physically going to be connected to one CPU socket or the other. /Bruce