From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from wes1-so1.wedos.net (wes1-so1.wedos.net [46.28.106.15]) by dpdk.org (Postfix) with ESMTP id 454D58D96 for ; Mon, 2 Nov 2015 16:26:11 +0100 (CET) Received: from pcviktorin.fit.vutbr.cz (pcviktorin.fit.vutbr.cz [147.229.13.147]) by wes1-so1.wedos.net (Postfix) with ESMTPSA id 3nqJ426HyCz4g6; Mon, 2 Nov 2015 16:26:10 +0100 (CET) Date: Mon, 2 Nov 2015 16:24:29 +0100 From: Jan Viktorin To: "Hunt, David" Message-ID: <20151102162429.796555d4@pcviktorin.fit.vutbr.cz> In-Reply-To: <56373F59.6080602@intel.com> References: <1446212826-19425-7-git-send-email-david.hunt@intel.com> <5633798B.2050708@intel.com> <20151030161106.4657232.16920.465@rehivetech.com> <56339AA9.1060505@intel.com> <20151102063209.GC17659@localhost.localdomain> <56373F59.6080602@intel.com> Organization: RehiveTech MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: dev@dpdk.org Subject: Re: [dpdk-dev] [PATCH v3 6/6] test: add checks for cpu flags on armv8 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 02 Nov 2015 15:26:11 -0000 On Mon, 2 Nov 2015 10:47:53 +0000 "Hunt, David" wrote: > On 02/11/2015 06:32, Jerin Jacob wrote: > > On Fri, Oct 30, 2015 at 04:28:25PM +0000, Hunt, David wrote: > > --snip-- > > > > > Hi Jan and Dave, > > > > I have reviewed your patches for arm[64] support. Please check the > > review comments. > --snip-- > > In order to debug this, Could provide the following > > values in tested armv8 platform. Look like its running 32bit compatible > > mode in your environment > > I'm using a Gigabyte MP30AR0 motherboard with an 8-core X-Gene, Running > a 4.3.0-rc6 kernel. > Here's the information on the cpu_flags issue you requested: > --snip-- > > root@mp30ar0:~# > > Hope this helps. > > Regards, > Dave. > My few bits to compare to ARMv7. There is AT_PLATFORM=v7l (and no aarch32), this is probably to be fixed... Altera SoC FPGA: # LD_SHOW_AUXV=1 sleep 1 AT_HWCAP: swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls AT_PAGESZ: 4096 AT_CLKTCK: 100 AT_PHDR: 0x10034 AT_PHENT: 32 AT_PHNUM: 8 AT_BASE: 0x76fd3000 AT_FLAGS: 0x0 AT_ENTRY: 0x149d9 AT_UID: 0 AT_EUID: 0 AT_GID: 0 AT_EGID: 0 AT_SECURE: 0 AT_RANDOM: 0x7ebbcf2f AT_EXECFN: /bin/sleep AT_PLATFORM: v7l # cat /proc/cpuinfo processor : 0 model name : ARMv7 Processor rev 0 (v7l) Features : swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpd32 CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x3 CPU part : 0xc09 CPU revision : 0 processor : 1 model name : ARMv7 Processor rev 0 (v7l) Features : swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpd32 CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x3 CPU part : 0xc09 CPU revision : 0 Hardware : Altera SOCFPGA Revision : 0000 Serial : 0000000000000000 Odroid XU4: # LD_SHOW_AUXV=1 sleep 1 AT_HWCAP: swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 AT_PAGESZ: 4096 AT_CLKTCK: 100 AT_PHDR: 0x10034 AT_PHENT: 32 AT_PHNUM: 9 AT_BASE: 0xb6f8c000 AT_FLAGS: 0x0 AT_ENTRY: 0x11191 AT_UID: 1000 AT_EUID: 1000 AT_GID: 1000 AT_EGID: 1000 AT_SECURE: 0 AT_RANDOM: 0xbec42ed6 AT_EXECFN: /bin/sleep AT_PLATFORM: v7l # cat /proc/cpuinfo Processor : ARMv7 Processor rev 1 (v7l) processor : 0 BogoMIPS : 3.07 processor : 1 BogoMIPS : 3.07 processor : 2 BogoMIPS : 3.07 processor : 3 BogoMIPS : 3.07 Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x0 CPU part : 0xc05 CPU revision : 1 Hardware : ODROIDC Revision : 000a Serial : 1b00000000000000 -- Jan Viktorin E-mail: Viktorin@RehiveTech.com System Architect Web: www.RehiveTech.com RehiveTech Brno, Czech Republic