From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f49.google.com (mail-wm0-f49.google.com [74.125.82.49]) by dpdk.org (Postfix) with ESMTP id 030948D39 for ; Mon, 30 Nov 2015 10:03:26 +0100 (CET) Received: by wmec201 with SMTP id c201so144599385wme.0 for ; Mon, 30 Nov 2015 01:03:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro-org.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent; bh=NiIxL5fgxeJak1btEwjmcoTRbkEFqRFivEf+jcunb4A=; b=XPDNmviUVa0+/VVsbVCFrHUbWCUJCIQcoBi6Pf8gxiNtunupq1CDP/CVLuz8N049x6 ykG7nFIKagRn9WLWBGCRte3EDie7fNNK3SOLbvisKSGI5CdAyC2BySioaOvrnoOFgbXX Gdfyr5oNbqfdUAv0+j9cBCfUZMR77DpjGnewHVBT5Jsfbw1l/JSIBJ7sxN9f/yhnuuP8 AhO1ZPXIIh9Ovkex2+XrVr6bvluRziSnrD59uES/xNS0VKvmKOzDFqDx919RY9nGZMtH Jqhp7CxY4y8oNqWIeKIpkQgGfFMHMZKxoazkWqt7AqVSU6CN1VQ/eRb5GG2jT/dFFHu3 j5gw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-type:content-disposition:in-reply-to :user-agent; bh=NiIxL5fgxeJak1btEwjmcoTRbkEFqRFivEf+jcunb4A=; b=PMScWo8elx8Rs/ytMnugBdGqkgjLtos1bp5ayg56k4+Yd6hhDV03A9UWbvr2uKihIc /fu9bKk6jV5YJtPJQT/Dj6mFADGLvATHyGAYecWvbZIJBphoLGmETzdayDa4oMYCx+ac RH4FioSEcoGnEkH+ZYj7NfNvUKFQHXWR8yk4Kcdl/DpFK0Ht0+tVNwn73y5xDwet/Yms GvND8lZYUbYi5GmTjw8q9vttjmeYP+mK5nddytibMJ9ic+NiXohrlql7x/28BWT2Z3J/ eApzvcPs/z1HTvArGXl8qJ/XDk9GdwiGRy4Fe3M+S3f1txBF8EcM15+cQQL8smBene9B ZzfQ== X-Gm-Message-State: ALoCoQnkRQVccQFJ1qnhiN6ejg/jhDyUyxYvrWXmr+a7wfG4FkY/mOLL1MZV+zL/Hsb8jf9USnmE X-Received: by 10.28.128.5 with SMTP id b5mr25051797wmd.25.1448874205849; Mon, 30 Nov 2015 01:03:25 -0800 (PST) Received: from localhost ([112.65.63.98]) by smtp.gmail.com with ESMTPSA id kj3sm45836182wjb.19.2015.11.30.01.03.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 30 Nov 2015 01:03:25 -0800 (PST) Date: Mon, 30 Nov 2015 12:03:21 -0500 From: Jianbo Liu To: Jerin Jacob Message-ID: <20151130170038.GA3472@qq.com> References: <1448631268-10692-1-git-send-email-jerin.jacob@caviumnetworks.com> <1448631268-10692-3-git-send-email-jerin.jacob@caviumnetworks.com> <20151129234829.GA2913@qq.com> <20151130054749.GA11512@localhost.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20151130054749.GA11512@localhost.localdomain> User-Agent: Mutt/1.5.21 (2010-09-15) Cc: dev@dpdk.org Subject: Re: [dpdk-dev] [PATCH v3 2/2] config: disable CONFIG_RTE_SCHED_VECTOR for arm X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 30 Nov 2015 09:03:26 -0000 On Mon, Nov 30, 2015 at 11:17:52AM +0530, Jerin Jacob wrote: > On Sun, Nov 29, 2015 at 06:48:29PM -0500, Jianbo Liu wrote: > > On Fri, Nov 27, 2015 at 07:04:28PM +0530, Jerin Jacob wrote: > > > Commit 42ec27a0178a causes compiling error on arm, as RTE_SCHED_VECTOR > > > does support only SSE intrinsic, so disable it till we have neon support. > > > > > > Fixes: 42ec27a0178a ("sched: enable SSE optimizations in config") > > > > > > Signed-off-by: Jerin Jacob > > > --- > > > config/common_arm64 | 1 + > > > config/defconfig_arm-armv7a-linuxapp-gcc | 1 + > > > 2 files changed, 2 insertions(+) > > > > > > diff --git a/config/common_arm64 b/config/common_arm64 > > > index 5e5e303..d6a9cb9 100644 > > > --- a/config/common_arm64 > > > +++ b/config/common_arm64 > > > @@ -46,3 +46,4 @@ CONFIG_RTE_LIBRTE_I40E_PMD=n > > > CONFIG_RTE_LIBRTE_LPM=n > > > CONFIG_RTE_LIBRTE_TABLE=n > > > CONFIG_RTE_LIBRTE_PIPELINE=n > > > +CONFIG_RTE_SCHED_VECTOR=n > > > diff --git a/config/defconfig_arm-armv7a-linuxapp-gcc b/config/defconfig_arm-armv7a-linuxapp-gcc > > > index 82143af..9924ff9 100644 > > > --- a/config/defconfig_arm-armv7a-linuxapp-gcc > > > +++ b/config/defconfig_arm-armv7a-linuxapp-gcc > > > @@ -57,6 +57,7 @@ CONFIG_RTE_LIBRTE_ACL=n > > > CONFIG_RTE_LIBRTE_LPM=n > > > CONFIG_RTE_LIBRTE_TABLE=n > > > CONFIG_RTE_LIBRTE_PIPELINE=n > > > +CONFIG_RTE_SCHED_VECTOR=n > > > > > > # cannot use those on ARM > > > CONFIG_RTE_KNI_KMOD=n > > > -- > > > 2.1.0 > > > > > > > Hi Jerin, > > Hi Jianbo, Thanks for the review. > Looking forward to seeing contributions to DPDK-ARM. > We definitely need more hands to make best DPDK-ARM port. > > > In this way, we still have to modify two files each time a new feature > > is added but not verified on ARM architectures. > > Since disabling those drivers and libs are common for both armv7 and > > armv8, can you put them in one config file, for example: common_arm? > > I initially thought of making it a single common_arm file, Then > later I realized that it may not be worth as, > > 1) If a new feature added to DPDK which has the dependency on SSE then > implementer has to disable on "n" platforms(tile, powerpc..).By unifying > single arm config will make it "n-1" so it's like "n" vs "n-1" not "n" > vs "2n" I'm talking about your patch, which is for ARM platform only. And the two files we need to modify are armv7 and armv8 configs. If you want to include other platforms, your patch is still incomplete :) > > 2) AFAIK, PCI NIC PMD's are not yet supported in ARMv7 platform yet > unlike ARMv8. > Till we have PCI NIC PMD support, armv7 config needs to be updated > for each and every new PMD inclusion. > > 3) neon capabilities are bit different in ARMv7 and ARMv8. > For instance, "vqtbl1q_u8" neon intrinsics is not defined in ARMv7 which used > in implementing ACL-NEON. i.e Need additional efforts to extend > the armv8 neon code to armv7(or vice versa).So it's better to > have fine control on the config file to enable selective features > The differences between ARMv7 and ARMv8 can't justify we only add new config for ARMv8. And this file is trying to disable drivers and libs which is not supported on ARM platforms for now. > 3) anyway we may need common_armv8 file to address the "IMPLEMENTATION > DEFINED" parts of the armv8 specific in future, like frequency at cntvct_el0 > runs ? optional features like armv8 crypto instruction support or not? > It's armv8 v1 or v2 ? atomic instruction support for not? its a long > list > I think these "IMPLEMENTATION DEFINED" features should be configured in the different platform (machine) config files. Can this common_arm64 solve your concern? > 4)I would like to see ARM configs as different config like i686, X86_64 > in DPDK > Basically, we need to use the default common_linux/bsd to enable the new-added features in DPDK. > > > It is not like common_arm64, which is solely for armv8 platform. > > Actually, the arm64 common config is defconfig_arm64-armv8a-linuxapp-gcc > > I thought so, Then I realized that we may have > FreeBSD, arm compiler, clang, llvm support in future. > > > you can include it in the thunderx or xgene1 config files respectively, > > and overriding some special config if needed. > > Agree. existing patch addresses this > If there exists a defconfig_arm64-armv8a-linuxapp-gcc, why needs to add a new file(common_arm64) in your patch? The defconfig_arm64-armv8a-xxx-xxx can be treated as a config for a common ARMv8 platform, and one which other specific ARMv8 platforms can base on. > > > > On the other hand, If we support the features in the future by > > replacing SSE intrinsic with NEON, we just need to remove the lines in one place. > > See point 3 above, > > I feel rather than coming with the framework to fix the exceptions it's > better to fix the exceptions its self. > I am planning to send out next patch by today for supporting > CONFIG_RTE_LIBRTE_LPM,CONFIG_RTE_LIBRTE_TABLE,CONFIG_RTE_LIBRTE_PIPELINE. > > i.e only a few entries will be common. Please find below the list, > the reason for setting as "n" for armv7 and armv8 is different. > lack of PCI PMD supports vs SIMD support. > > CONFIG_RTE_IXGBE_INC_VECTOR=n > CONFIG_RTE_LIBRTE_VIRTIO_PMD=n > CONFIG_RTE_LIBRTE_IVSHMEM=n > CONFIG_RTE_LIBRTE_FM10K_PMD=n > CONFIG_RTE_LIBRTE_I40E_PMD=n > Yes, but what if new SSE enhancement is added on x86, we need to add it to the list. > - Jerin > > > > > Regards, > > Jianbo