From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id D6D9D5A06 for ; Tue, 2 Feb 2016 09:48:04 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 02 Feb 2016 00:48:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,384,1449561600"; d="scan'208";a="903670729" Received: from yliu-dev.sh.intel.com (HELO yliu-dev) ([10.239.66.49]) by orsmga002.jf.intel.com with ESMTP; 02 Feb 2016 00:48:02 -0800 Date: Tue, 2 Feb 2016 16:49:33 +0800 From: Yuanhan Liu To: David Marchand Message-ID: <20160202084933.GJ4257@yliu-dev.sh.intel.com> References: <1454091717-32251-1-git-send-email-sshukla@mvista.com> <20160201134854.GE4257@yliu-dev.sh.intel.com> <20160202054345.GI4257@yliu-dev.sh.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [PATCH v6 1/8] eal: pci: add api to rd/wr pci bar region X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Feb 2016 08:48:05 -0000 On Tue, Feb 02, 2016 at 06:50:18AM +0100, David Marchand wrote: > On Tue, Feb 2, 2016 at 6:43 AM, Yuanhan Liu wrote: > > On Tue, Feb 02, 2016 at 09:44:14AM +0530, Santosh Shukla wrote: > >> Current use-case is virtio: It is used as io_bar which is first > >> bar[1]. But implementation is generic, can be used to do rd/wr for > >> other bar index too. Also vfio facilitate user to do rd/wr to pci_bars > >> w/o mapping that bar, So apis will be useful for such cases in future. > >> > >> AFAIU: uio has read/write_config api only and Yes if bar region mapped > >> then no need to do rd/wr, user can directly access the pci_memory. But > >> use-case of this api entirely different: unmapped memory by > >> application context i.e.. vfio_rd/wr-way {pread/pwrite-way}. > >> > >> Is above explanation convincing? Pl. let me know. > > > > TBH, not really. So, as you stated, it should be generic APIs to > > read/write bar space, but limiting it to VFIO only and claiming > > that read/write bar space is not support by other drivers (such > > as UIO) while in fact it can (in some ways) doesn't seem right > > to me. > > > > Anyway, it's just some thoughts from me. David, comments? > > >From the very start, same opinion. > We should have a unique api to access those, and eal should hide > details like kernel drivers (uio, vfio, whatever) to the pmd. > > Now the thing is, how to do this in an elegant and efficient way. I was thinking that we may just make it be IO port specific read/ write functions: rte_eal_pci_ioport_read(dev, bar, buf, size) { return if not an IO bar; if (has io) return inb/w/l(); if (vfio) return vfio_ioport_read(); else, claim aloud that io port read is not allowed } Let us not handle memory bar resource here: in such case, you should go with rte_eal_pci_map_device() and do it with memory mapped io. Does that make any sense? --yliu