From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 98CA74CE7 for ; Thu, 26 May 2016 15:49:14 +0200 (CEST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP; 26 May 2016 06:48:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,367,1459839600"; d="scan'208";a="989249591" Received: from bricha3-mobl3.ger.corp.intel.com ([10.252.31.37]) by fmsmga002.fm.intel.com with SMTP; 26 May 2016 06:48:51 -0700 Received: by (sSMTP sendmail emulation); Thu, 26 May 2016 14:48:49 +0025 Date: Thu, 26 May 2016 14:48:49 +0100 From: Bruce Richardson To: David Hunt Cc: dev@dpdk.org, olivier.matz@6wind.com Message-ID: <20160526134848.GM7708@bricha3-MOBL3> References: <1464267068-56805-1-git-send-email-david.hunt@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1464267068-56805-1-git-send-email-david.hunt@intel.com> Organization: Intel Shannon Ltd. User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [dpdk-dev] [PATCH] test: fix mempool perf test enq_count wraparound of 32-bit uint X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 May 2016 13:49:15 -0000 On Thu, May 26, 2016 at 01:51:08PM +0100, David Hunt wrote: > recent CPU's can easily wrap around a 32-bit unsigned int in > the mempool perf test. Increase to a 64-bit uint. > > Signed-off-by: David Hunt > --- > app/test/test_mempool_perf.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/app/test/test_mempool_perf.c b/app/test/test_mempool_perf.c > index cdc02a0..2f48545 100644 > --- a/app/test/test_mempool_perf.c > +++ b/app/test/test_mempool_perf.c > @@ -110,7 +110,7 @@ static unsigned n_keep; > > /* number of enqueues / dequeues */ > struct mempool_test_stats { > - unsigned enq_count; > + uint64_t enq_count; > } __rte_cache_aligned; > > static struct mempool_test_stats stats[RTE_MAX_LCORE]; > @@ -189,7 +189,7 @@ static int > launch_cores(unsigned cores) > { > unsigned lcore_id; > - unsigned rate; > + uint64_t rate; > int ret; > unsigned cores_save = cores; > > @@ -238,7 +238,7 @@ launch_cores(unsigned cores) > for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) > rate += (stats[lcore_id].enq_count / TIME_S); > > - printf("rate_persec=%u\n", rate); > + printf("rate_persec=%lu\n", rate); Use PRIu64 instead of %lu, as %lu is only 32-bit on 32-bit systems. /Bruce