From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from NAM01-BY2-obe.outbound.protection.outlook.com (mail-by2nam01on0040.outbound.protection.outlook.com [104.47.34.40]) by dpdk.org (Postfix) with ESMTP id C2DB4558C for ; Sat, 23 Jul 2016 12:39:13 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=Z9uQr9zgcTTIhlPpS0+CJiUeYCWrFgcSv3YRGwGi7Xw=; b=PQ/anVx3nbAuHgBADRm7gpzBq92QH60/GgBkUxnk406DyNQt00rKyaJrrOcTlEzyzrMXZ2+MTxuzyfLQLuhlJmLDBRH0uYrfpX4yuKNKMFkAHMhrkYMg3MrTU23zYhKZxtVsHXrIgg559Zr2Z62XXb37nhXiqdVKtIq/PLNpI6Q= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Jerin.Jacob@cavium.com; Received: from localhost.localdomain (111.93.218.67) by CY1PR0701MB1726.namprd07.prod.outlook.com (10.163.21.140) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.544.10; Sat, 23 Jul 2016 10:39:07 +0000 Date: Sat, 23 Jul 2016 16:08:49 +0530 From: Jerin Jacob To: "Ananyev, Konstantin" CC: Thomas Monjalon , Juhamatti Kuusisaari , "dev@dpdk.org" Message-ID: <20160723103847.GB18376@localhost.localdomain> References: <20160715043951.32040-1-juhamatti.kuusisaari@coriant.com> <2601191342CEEE43887BDE71AB97725836B7E32F@irsmsx105.ger.corp.intel.com> <14017551.U6D1dIIx0P@xps13> <20160723060515.GA13747@localhost.localdomain> <20160723093621.GA18376@localhost.localdomain> <2601191342CEEE43887BDE71AB97725836B81292@irsmsx105.ger.corp.intel.com> MIME-Version: 1.0 Content-Type: text/plain; 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CY1PR0701MB1726; 6:p3rUnEPN+4ROrewULlyxFLqE3OKyeDZzYa/q4GMS8yQorRTjq6URmyhK+RmlHgrrEszmNNgZHQQVrxoueVu8xrHDCETG9xn88k951QJWbeao5A6mwOjMcxDNuVVrAtQYsfYEpW/g/NWdQGjSFdTZbNNHq25zCyGage0v/yvh66JTq/RZ5Ho7LMIawpkDf+cORUSCmi9bsZLMOZlPkQE1hZ20hxF83+oXOd5gk8kRwhHrRqM4GZTy6TSqZu9PogsFv5nbseQ8txZF3Sz1cdxcE0duuAwCX7jtazWce+yPf90=; 5:/ptb2Gw7OZDGDXVF4wGXqdur1uyY2EkkCiJpT6zIJCkeT9tTZO0lnC+DqHivTrEug6/l01tNhug0tq7zCXLYRCQGvlcEudgvMvqxbUESuXilpP8PdaNNSaioYnx/rv2dw/UG4YWdGpHBWdC1uVmWIw==; 24:yVoKpPq+9m+B9pa8HaAMLxchFMPUgqQLJym4G+u2HDTCe66Fu/sGkPg4WtxHTvAC6z2JxPfvbz0bP6KuyaxOr7LiK7uCVewNcVGTaK+RRLk=; 7:iYzu1IIWoB/nTO5QzDBLaKf17dKqKiH8AKIZi/vO5nwEhFg6fbbV+69dpEo0VI89wnVC4mrxUxQJoPmFJicXJsUak7OvNTRmvKBxhbRUwRaMoU+0dmYUXHoaGdLdcOM9gttCGp/oMuqo9Xtud4ZxkAe6tNkxE+FW2AMsW5eAyVre8uXOv/dumlYm86998DJ3T/4Z+RvSzL0It3ovJya9RLXqWcB+3YUVfsPyR+HkMU+dO7GD0Zf4F0Y/Uytjiv7r SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2016 10:39:07.8335 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR0701MB1726 Subject: Re: [dpdk-dev] [PATCH] lib: change rte_ring dequeue to guarantee ordering before tail update X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 23 Jul 2016 10:39:14 -0000 On Sat, Jul 23, 2016 at 10:14:51AM +0000, Ananyev, Konstantin wrote: > Hi lads, > > > On Sat, Jul 23, 2016 at 11:02:33AM +0200, Thomas Monjalon wrote: > > > 2016-07-23 8:05 GMT+02:00 Jerin Jacob : > > > > On Thu, Jul 21, 2016 at 11:26:50PM +0200, Thomas Monjalon wrote: > > > >> > > Consumer queue dequeuing must be guaranteed to be done fully > > > >> > > before the tail is updated. This is not guaranteed with a read barrier, changed to a write barrier just before tail update which in > > practice guarantees correct order of reads and writes. > > > >> > > > > > >> > > Signed-off-by: Juhamatti Kuusisaari > > > >> > > > > > >> > > > > >> > Acked-by: Konstantin Ananyev > > > >> > > > >> Applied, thanks > > > > > > > > There was ongoing discussion on this > > > > http://dpdk.org/ml/archives/dev/2016-July/044168.html > > > > > > Sorry Jerin, I forgot this email. > > > The problem is that nobody replied to your email and you did not nack > > > the v2 of this patch. > > It's probably my bad. > I acked the patch before Jerin response, and forgot to reply later. > > > > > > > > This change may not be required as it has the performance impact. > > > > > > We need to clearly understand what is the performance impact (numbers > > > and use cases) on one hand, and is there a real bug fixed by this > > > patch on the other hand? > > > > IHMO, there is no real bug here. rte_smb_rmb() provides the LOAD-STORE barrier to make sure tail pointer WRITE happens only after prior > > LOADS. > > Yep, from what I read at the link Jerin provided, indeed it seems rte_smp_rmb() is enough for the arm arch here... > For ppc, as I can see both rte_smp_rmb()/rte_smp_wmb() emits the same instruction. > > > > > Thoughts? > > Wonder how big is a performance impact? With this change we need to wait for addtional STORES to be completed to local buffer in addtion to LOADS from ring buffers memory. > If there is a real one, I suppose we can revert the patch? Request to revert this one as their no benifts for other architectures and indeed it creates addtional delay in waiting for STORES to complete in ARM. Lets do the correct thing by reverting it. Jerin > Konstantin > > > > > > > > > Please guys make things clear and we'll revert if needed.