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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR03MB2433 Subject: [dpdk-dev] [PATCH v2] test_cryptodev_perf: IV and digest should be stored at a DMAeble address X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 07 Oct 2016 11:38:23 -0000 From: Akhil Goyal For physical crypto devices, IV and digest are processed by the crypto device which need the contents to be written on some DMA able address. So in order to do that, IV and digest are accomodated in the packet. Signed-off-by: Akhil Goyal v2: patch rebased --- app/test/test_cryptodev_perf.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/app/test/test_cryptodev_perf.c b/app/test/test_cryptodev_perf.c index 4aee9af..08eda81 100644 --- a/app/test/test_cryptodev_perf.c +++ b/app/test/test_cryptodev_perf.c @@ -2722,9 +2722,12 @@ test_perf_set_crypto_op_aes(struct rte_crypto_op *op, struct rte_mbuf *m, op->sym->auth.aad.length = AES_CIPHER_IV_LENGTH; /* Cipher Parameters */ - op->sym->cipher.iv.data = aes_iv; + op->sym->cipher.iv.data = (uint8_t *)m->buf_addr + m->data_off; + op->sym->cipher.iv.phys_addr = rte_pktmbuf_mtophys(m); op->sym->cipher.iv.length = AES_CIPHER_IV_LENGTH; + rte_memcpy(op->sym->cipher.iv.data, aes_iv, AES_CIPHER_IV_LENGTH); + /* Data lengths/offsets Parameters */ op->sym->auth.data.offset = 0; op->sym->auth.data.length = data_len; @@ -2893,7 +2896,9 @@ test_perf_aes_sha(uint8_t dev_id, uint16_t queue_id, rte_pktmbuf_free(mbufs[k]); return -1; } - + /* Make room for Digest and IV in mbuf */ + rte_pktmbuf_append(mbufs[i], digest_length); + rte_pktmbuf_prepend(mbufs[i], AES_CBC_CIPHER_IV_LENGTH); } -- 2.9.3