From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg0-f53.google.com (mail-pg0-f53.google.com [74.125.83.53]) by dpdk.org (Postfix) with ESMTP id 6DB743792 for ; Fri, 16 Dec 2016 21:15:31 +0100 (CET) Received: by mail-pg0-f53.google.com with SMTP id p66so35613008pga.2 for ; Fri, 16 Dec 2016 12:15:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8vsWvoSH07oFm20clKBrEOd0oUIwc77RnfHup4Lw3dI=; b=1pJi9xq9jPimotQO8ogSWbXkL9wX/ONPbRaLpbcHU3jHdRHkia4kZgJVvcs+5/qMKM Q1mUBmt2PjA+phnplQ3rDYNcyQisaChRJLwjkwrJFtYtKUXYwccQzIS4dBXY89Cv4/1G bhIeHmDcf9lW3hNbITxi9Ak1w0u4LTOt26d+JUVVysq/Rt2gWZPF/ASVdJvMkG0GjztT rBWkAsPyRf7J7jJV8bYFdgLOCyyXZN8s9vlNaLRnYsf338bcCfcvtDkFb8+39zmCwn1g 7zzY1Y7JERTFr9rRKI9F1ACR55F9klAuVXu8EmSe9PgUlPihg25nnpD+BY0AU+gaSgiZ tuOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8vsWvoSH07oFm20clKBrEOd0oUIwc77RnfHup4Lw3dI=; b=VSNhPt/zrbc+kg/osVXG4SldApekgHqn/x/x4V8txntBLfNVrNm1ZC69ZNWC1cb3eG yIhDrHArCcA2EQhSAJyWorXMjP5oTTYCwEXl1jdVmgf/odJbER2zqsjY5pIMmZFlPywe flEJFdZJ43hSdJPq3LQ9uEPvq+dyRcz/gJV2TRr+O39yvF8xkrer8f1TmgwzLxPOg0pR bcjf/LUooQg6jyorw8fuk0f4re4iy0SUwd0JWo56ckjM0bIkkboopkqbMw2vVg21iHXR 838kQICd4HsaapXysqowQnpf8oGZnTaLqXsXIYKfbp26vSSaZw5+PobqCOuPXTTuMTbP 4NCg== X-Gm-Message-State: AKaTC02EJugAwAJXM6DGzG0qrEKqAtCOu1g06l+xH9ZS6/GafhNVYRhD2wjQ8zD/Vy/MrA== X-Received: by 10.99.37.2 with SMTP id l2mr8796789pgl.160.1481919330191; Fri, 16 Dec 2016 12:15:30 -0800 (PST) Received: from xeon-e3 (204-195-18-65.wavecable.com. [204.195.18.65]) by smtp.gmail.com with ESMTPSA id v193sm13824628pgb.37.2016.12.16.12.15.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 16 Dec 2016 12:15:30 -0800 (PST) Date: Fri, 16 Dec 2016 12:15:22 -0800 From: Stephen Hemminger To: Thomas Monjalon Cc: dev@dpdk.org, Shreyansh Jain , Stephen Hemminger Message-ID: <20161216121522.58281062@xeon-e3> In-Reply-To: <17034171.EHDWhStFHz@xps13> References: <20161214235920.12877-1-sthemmin@microsoft.com> <544b6faf-11f4-93fe-6427-7d3fcfaba388@nxp.com> <20161215092631.5cb798b2@xeon-e3> <17034171.EHDWhStFHz@xps13> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH 2/2] hyperv: VMBUS support infrastucture X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Dec 2016 20:15:31 -0000 On Fri, 16 Dec 2016 19:09:02 +0100 Thomas Monjalon wrote: > 2016-12-15 09:26, Stephen Hemminger: > > On Thu, 15 Dec 2016 12:19:44 +0530 > > Shreyansh Jain wrote: > > > It is not a scale-able model where we have to change eth_driver/eth_dev > > > for every new device type, other than PCI. Maybe VMBus is _very_ close > > > to PCI so no changes are required in PCI layer (common, linuxapp, > > > bsdapp) - but, for others it won't stop there. > > > > > > At the least, rte_pci_driver/rte_pci_device should be removed from > > > eth_driver & rte_eth_dev, respectively - relying on rte_driver and > > > rte_device. > > > > > > This is the primary reason work on the SoC patchset and now the new Bus > > > model is being done. > > > > Agreed. the better long term model is to use C style inheritance where > > rte_pci_driver has eth_driver inside. > > The other alternative is to make the second element an opaque pointer. > > > > But that was too big a change, and not necessary to get VMBUS to work. > > Longer term refactoring will take more effort. Go ahead and address it > > with a better bus model, but that probably isn't going to be ready for > > a couple of releases. > > We'll consider only the approach of generalizing the bus model for integr ation. > Stephen, you are welcome to help make it happen and rebase your work > on top of this new model. > Thanks I will generalize it to PCI and VMBUS only. I am not inventing a generic SOC model since that is something that I don't have sufficient knowledge. This fits the YAGNI principle.