From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-f177.google.com (mail-pf0-f177.google.com [209.85.192.177]) by dpdk.org (Postfix) with ESMTP id 53E395911 for ; Mon, 27 Feb 2017 17:53:47 +0100 (CET) Received: by mail-pf0-f177.google.com with SMTP id p185so9330962pfb.1 for ; Mon, 27 Feb 2017 08:53:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aM//l/B9ArdfrgrXi8GglnPGyQ8UbRrV+3VEbwHl0UI=; b=MnnPZ9olsD7ZUW8gzYI81Hydl9Uin+TxmUomwI2n/jOpSP+84FOx2ErcO0XdMOMTjA HxJWaNU2gzInozUseJm6ZlmSnNHFh6rRLIF1Rka04Fh7Zc3BLdmAT0upVK+MW7BP6Sj8 wr1aJEKsP9Kg7j5dQ6vGBlpqoyk8JVItGSytuHJQTlHFzqp7t9A+Bkb4R61JWetY+Xwd NcnomaiTyR1G8C7V2kU1R7w0PdCozl2pL4F4NS2ZS2kOuKZphN4NmduTf5HiBA5KKVcC AWYpay5Khm41r4kQiCzcJXg386QXvlA0DdKaDsJNkzdJiqBH91SLMZzKqkGzR+bPhMGC C3fQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aM//l/B9ArdfrgrXi8GglnPGyQ8UbRrV+3VEbwHl0UI=; b=Ru2nGJ3qf6YboyONmvWIzPeAr2NWiB6GibxaT6PN9JSEMVKXYaO1IDA1sTH4ddRY3i riEOMrg8dbYK03EZfUBzUt23xbLQRDSxaSs+1AdRjrcsQ/zZZVs7FBeqDggLL9bvia/o vw5omdoN9MhxwYogGXBUCfg3cR3mi8XRgQo6iA3YKW5tgb6MiT5xhovmF+YTFp+URnpn c0wGPqfzqfMZGUq8z5RsrI6LgiCkO1BtsJE4N+VQCJshSYAO0hCVk2TIeXdWsMt3+kM+ 46Zp7HnuAMDL6I6NHxrCfqNpAE5N0RBqLyYuBUK1VAiWVr0hESd0x+z0NXCCXZgpivDd U4Rw== X-Gm-Message-State: AMke39n8gIp0vO4alU/jBf2uOE8JpNHWhuIWcj5k907hem2VFfdmfnJFxwgjLkTq4dA0cg== X-Received: by 10.84.210.228 with SMTP id a91mr6928139pli.120.1488214426047; Mon, 27 Feb 2017 08:53:46 -0800 (PST) Received: from xeon-e3 (204-195-18-65.wavecable.com. [204.195.18.65]) by smtp.gmail.com with ESMTPSA id 197sm2043946pfv.19.2017.02.27.08.53.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 27 Feb 2017 08:53:45 -0800 (PST) Date: Mon, 27 Feb 2017 08:53:39 -0800 From: Stephen Hemminger To: Allain Legacy Cc: , Message-ID: <20170227085339.3f14a3fb@xeon-e3> In-Reply-To: <1488136143-116389-8-git-send-email-allain.legacy@windriver.com> References: <1487985795-136044-1-git-send-email-allain.legacy@windriver.com> <1488136143-116389-1-git-send-email-allain.legacy@windriver.com> <1488136143-116389-8-git-send-email-allain.legacy@windriver.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v2 07/15] net/avp: driver registration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Feb 2017 16:53:47 -0000 On Sun, 26 Feb 2017 14:08:55 -0500 Allain Legacy wrote: > +struct avp_dev { > + uint32_t magic; /**< Memory validation marker */ > + uint64_t device_id; /**< Unique system identifier */ > + struct ether_addr ethaddr; /**< Host specified MAC address */ > + struct rte_eth_dev_data *dev_data; > + /**< Back pointer to ethernet device data */ > + volatile uint32_t flags; /**< Device operational flags */ > + uint8_t port_id; /**< Ethernet port identifier */ > + struct rte_mempool *pool; /**< pkt mbuf mempool */ > + unsigned int guest_mbuf_size; /**< local pool mbuf size */ > + unsigned int host_mbuf_size; /**< host mbuf size */ > + unsigned int max_rx_pkt_len; /**< maximum receive unit */ > + uint32_t host_features; /**< Supported feature bitmap */ > + uint32_t features; /**< Enabled feature bitmap */ > + unsigned int num_tx_queues; /**< Negotiated number of transmit queues */ > + unsigned int max_tx_queues; /**< Maximum number of transmit queues */ > + unsigned int num_rx_queues; /**< Negotiated number of receive queues */ > + unsigned int max_rx_queues; /**< Maximum number of receive queues */ > + > + struct rte_avp_fifo *tx_q[RTE_AVP_MAX_QUEUES]; /**< TX queue */ > + struct rte_avp_fifo *rx_q[RTE_AVP_MAX_QUEUES]; /**< RX queue */ > + struct rte_avp_fifo *alloc_q[RTE_AVP_MAX_QUEUES]; > + /**< Allocated mbufs queue */ > + struct rte_avp_fifo *free_q[RTE_AVP_MAX_QUEUES]; > + /**< To be freed mbufs queue */ > + > + /* mutual exclusion over the 'flag' and 'resp_q/req_q' fields */ > + rte_spinlock_t lock; What exactly is the spinlock protecting? The control operations in DPDK are defined to be not thread safe. I.e it is responsibility of caller to synchronize. Therefore is lock really needed?