From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id AD8E22C4B for ; Thu, 27 Apr 2017 11:25:45 +0200 (CEST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Apr 2017 02:25:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,383,1488873600"; d="scan'208";a="850351600" Received: from bricha3-mobl3.ger.corp.intel.com ([10.237.221.133]) by FMSMGA003.fm.intel.com with SMTP; 27 Apr 2017 02:25:41 -0700 Received: by (sSMTP sendmail emulation); Thu, 27 Apr 2017 10:25:40 +0100 Date: Thu, 27 Apr 2017 10:25:40 +0100 From: Bruce Richardson To: Qi Zhang Cc: jingjing.wu@intel.com, helin.zhang@intel.com, wenzhuo.lu@intel.com, jing.d.chen@intel.com, ferruh.yigit@intel.com, dev@dpdk.org Message-ID: <20170427092539.GA7544@bricha3-MOBL3.ger.corp.intel.com> References: <20170424145848.18544-1-qi.z.zhang@intel.com> <20170427070107.65465-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170427070107.65465-1-qi.z.zhang@intel.com> Organization: Intel Research and =?iso-8859-1?Q?De=ACvel?= =?iso-8859-1?Q?opment?= Ireland Ltd. User-Agent: Mutt/1.8.0 (2017-02-23) Subject: Re: [dpdk-dev] [PATCH 0/3 v2] disable vector PMD for i686 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 27 Apr 2017 09:25:46 -0000 On Thu, Apr 27, 2017 at 03:01:04AM -0400, Qi Zhang wrote: > Vector PMD is not designed for i686 orginally, but it still can be active > with i686 compile option. > Below are observed failure when vPMD is invovled on i686 > (but may not limited to) > > 1) memory overwrite when assign 2 mbuf points to rx return points. > _mm_storeu_si128((__m128i *)&rx_pkts[pos+2], mbp2) Is this a serious issue that prevents us using the driver? I think it's been in the code for quite some time. Can it not be relatively easily fixed for 32-bit builds? > > 2) rearm_data is not 16 bytes aligned that cause general-protection exception > _mm_store_si128((__m128i *)&rx_pkts[0]->rearm_data, rearm0); > Good catch. I think this is also an easy fix. My preferred fix is to explicitly align the rearm data on a 16-byte boundary. It would add some padding to the middle of cacheline0 of the mbuf, but given that we explicitly move other data to cacheline1, we will have padding on 32-bit anyway, be it in the middle or the end of the mbuf cachelines. > So the patch set will exclude Vector PMD from compile with i686 configure. > > Qi Zhang (3): > net/i40e: disable vector PMD for i686 > net/ixgbe: disable vector PMD for i686 > net/fm10k: disable vector PMD for i686 > > drivers/net/fm10k/Makefile | 2 ++ > drivers/net/i40e/Makefile | 2 +- > drivers/net/ixgbe/Makefile | 2 +- > 3 files changed, 4 insertions(+), 2 deletions(-) > > -- > 2.9.3 >