[dpdk-dev] [PATCH v2] ethdev: fix document for flow API

[dpdk-dev] [PATCH v2] ethdev: fix document for flow API

[Qi Zhang]

Fix document for fuzzy match and GRE

Fixes: a3a2e2c8f7de ("ethdev: add fuzzy match in flow API")
Fixes: 7cd048321d1d ("ethdev: add MPLS and GRE flow API items")

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
v2:
- minor fix

 doc/guides/prog_guide/rte_flow.rst | 13 ++++++++-----
 lib/librte_ether/rte_flow.h        |  5 ++++-
 2 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst
index 1b44f50..662a912 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -898,7 +898,7 @@ Matches a MPLS header.
 - Default ``mask`` matches label only.
 
 Item: ``GRE``
-^^^^^^^^^^^^^^
+^^^^^^^^^^^^^
 
 Matches a GRE header.
 
@@ -907,7 +907,7 @@ Matches a GRE header.
 - Default ``mask`` matches protocol only.
 
 Item: ``FUZZY``
-^^^^^^^^^^^^^^^^^
+^^^^^^^^^^^^^^^
 
 Fuzzy pattern match, expect faster than default.
 
@@ -918,19 +918,22 @@ value, but it is possible two different patterns have the same hash value.
 Matching accuracy level can be configured by threshold. Driver can divide the
 range of threshold and map to different accuracy levels that device support.
 
+Threshold 0 means perfect match (no fuzziness), while threshold 0xffffffff
+means fuzziest match.
+
 .. _table_rte_flow_item_fuzzy:
 
 .. table:: FUZZY
 
    +----------+---------------+--------------------------------------------------+
    | Field    |   Subfield    | Value                                            |
-   +==========+===========+======================================================+
+   +==========+===============+==================================================+
    | ``spec`` | ``threshold`` | 0 as perfect match, 0xffffffff as fuzziest match |
    +----------+---------------+--------------------------------------------------+
    | ``last`` | ``threshold`` | upper range value                                |
-   +----------+-----------+------------------------------------------------------+
+   +----------+---------------+--------------------------------------------------+
    | ``mask`` | ``threshold`` | bit-mask apply to "spec" and "last"              |
-   +----------+-----------+------------------------------------------------------+
+   +----------+---------------+--------------------------------------------------+
 
 Usage example, fuzzy match a TCPv4 packets:
 
diff --git a/lib/librte_ether/rte_flow.h b/lib/librte_ether/rte_flow.h
index cfbed30..c3e46b5 100644
--- a/lib/librte_ether/rte_flow.h
+++ b/lib/librte_ether/rte_flow.h
@@ -719,9 +719,12 @@ static const struct rte_flow_item_gre rte_flow_item_gre_mask = {
  * Matching accuracy level can be configure by threshold.
  * Driver can divide the range of threshold and map to different
  * accuracy levels that device support.
+ *
+ * Threshold 0 means perfect match (no fuzziness), while threshold
+ * 0xffffffff means fuzziest match.
  */
 struct rte_flow_item_fuzzy {
-	uint32_t thresh; /**< Accuracy threshold*/
+	uint32_t thresh; /**< Accuracy threshold. */
 };
 
 /** Default mask for RTE_FLOW_ITEM_TYPE_FUZZY. */
-- 
2.7.4

Re: [dpdk-dev] [PATCH v2] ethdev: fix document for flow API

[Adrien Mazarguil]

On Thu, Jul 06, 2017 at 02:32:19AM -0400, Qi Zhang wrote:
> Fix document for fuzzy match and GRE
> 
> Fixes: a3a2e2c8f7de ("ethdev: add fuzzy match in flow API")
> Fixes: 7cd048321d1d ("ethdev: add MPLS and GRE flow API items")
> 
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> ---
> v2:
> - minor fix

Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>

-- 
Adrien Mazarguil
6WIND

Re: [dpdk-dev] [PATCH v2] ethdev: fix document for flow API

[Thomas Monjalon]

06/07/2017 15:48, Adrien Mazarguil:
> On Thu, Jul 06, 2017 at 02:32:19AM -0400, Qi Zhang wrote:
> > Fix document for fuzzy match and GRE
> > 
> > Fixes: a3a2e2c8f7de ("ethdev: add fuzzy match in flow API")
> > Fixes: 7cd048321d1d ("ethdev: add MPLS and GRE flow API items")
> > 
> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> 
> Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>

Applied, thanks