From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from new2-smtp.messagingengine.com (new2-smtp.messagingengine.com [66.111.4.224]) by dpdk.org (Postfix) with ESMTP id 6B5D71B2E5 for ; Wed, 1 Nov 2017 16:40:21 +0100 (CET) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailnew.nyi.internal (Postfix) with ESMTP id F3AD6F95; Wed, 1 Nov 2017 11:40:19 -0400 (EDT) Received: from frontend1 ([10.202.2.160]) by compute1.internal (MEProxy); Wed, 01 Nov 2017 11:40:20 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fridaylinux.org; h=cc:content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=TezRllRjN+ybYbRcDBTuVSsfYJSOs9ya4qGAV6fmrhs=; b=A+LZrA2o C59c6l2wB0n5J+6pu7hcFjLEocEIJRb5Ahphnyrkk5PIjr2yI34PuiqYqdBzYFPa u6u7a6i/yuil/txmrX0c/uN9tKtLJF2aFR2WfeDrpBtK5RemrUui9m4rp09QPfb3 Fp87oHKx/7f69uPe2S8uW8Pvdv+dZFahZOC2lFfG09voaj+Xoq1QOgyuN3icQz2J XgEopB5i+iOVOpXP9cSHgWN6sypihRIhMJOA2jwsEtsFFqkbkd4GLiHdsWTYDyvF y5TcsQlZU/vEBFm2+/zb1vID+Zq9kGbISbFZ/nyDmJjfSTfTSjEInGNGu4ZNXXOB 3L5Wo89aDk4oJQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-sender :x-me-sender:x-sasl-enc; s=fm1; bh=TezRllRjN+ybYbRcDBTuVSsfYJSOs 9ya4qGAV6fmrhs=; b=Veeb9RPkjH1P05XUXz5PPyAFze6r7EVrb5VVrIHavPkdv d3T4Wm+5XWqMSNU/6oRryUr4XVkVMFQnEAYD/7Lx742B5Luu+rx8iS3vmH0njmqP Xj+LP7rGBgB/I9P5RQrGicKxIZ/TY402qzqYoZLbHdejtxRakY5T0Z/gde4K7N6J iYYluVzFymJdO5FqflPzCax5As+N2sWZsE7DEnN7f8BUuwHWTqAzr1sJMuluGo9g fvL0MxD/ohmpZbQVRGWdXuKXcAPKcrTNSbHTiVAvrhofgj1iiHViXwptVy04VO9U jGcvaKnEHE0U9QE2SuQXQTEas9G1AsBs+V4RxyJlA== X-ME-Sender: Received: from yliu-home (unknown [124.79.168.36]) by mail.messagingengine.com (Postfix) with ESMTPA id 616D47F91E; Wed, 1 Nov 2017 11:40:18 -0400 (EDT) Date: Wed, 1 Nov 2017 23:40:13 +0800 From: Yuanhan Liu To: Zhiyong Yang Cc: dev@dpdk.org, maxime.coquelin@redhat.com, "Tan, Jianfeng" Message-ID: <20171101154013.GU1545@yliu-home> References: <20171031094456.24912-1-zhiyong.yang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171031094456.24912-1-zhiyong.yang@intel.com> User-Agent: Mutt/1.5.24 (2015-08-30) Subject: Re: [dpdk-dev] [PATCH] net/virtio: fix use_msix get the wrong value X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Nov 2017 15:40:21 -0000 On Tue, Oct 31, 2017 at 05:44:56PM +0800, Zhiyong Yang wrote: > When running l3fwd-power to test virtio rxq interrupt using vfio > pci noiommu mode, startup fails. What errors have you met? > In the function virtio_read_caps, > the code if (flags & PCI_MSIX_ENABLE) intends to double check > if vfio msix is enabled or not. However, it is indeed not valid. > Come back to l3fwd-power, use_msix is not assigned to the right > value "1". The patch fixes the issue. Jianfeng, could you review it? You are the last author changed the code. Will it break your case? --yliu > Fixes: cb482cb3a305 ("net/virtio: fix MAC address read") > Signed-off-by: Zhiyong Yang > --- > drivers/net/virtio/virtio_pci.c | 11 +---------- > 1 file changed, 1 insertion(+), 10 deletions(-) > > diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c > index 55b717c03..be5b07a58 100644 > --- a/drivers/net/virtio/virtio_pci.c > +++ b/drivers/net/virtio/virtio_pci.c > @@ -580,8 +580,6 @@ get_cfg_addr(struct rte_pci_device *dev, struct virtio_pci_cap *cap) > return base + offset; > } > > -#define PCI_MSIX_ENABLE 0x8000 > - > static int > virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw) > { > @@ -609,14 +607,7 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw) > } > > if (cap.cap_vndr == PCI_CAP_ID_MSIX) { > - /* Transitional devices would also have this capability, > - * that's why we also check if msix is enabled. > - * 1st byte is cap ID; 2nd byte is the position of next > - * cap; next two bytes are the flags. > - */ > - uint16_t flags = ((uint16_t *)&cap)[1]; > - > - if (flags & PCI_MSIX_ENABLE) > + if (dev->intr_handle.type == RTE_INTR_HANDLE_VFIO_MSIX) > hw->use_msix = 1; > } > > -- > 2.13.3