From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: <Jianbo.Liu@arm.com> Received: from EUR03-DB5-obe.outbound.protection.outlook.com (mail-eopbgr40061.outbound.protection.outlook.com [40.107.4.61]) by dpdk.org (Postfix) with ESMTP id 9EF3412001 for <dev@dpdk.org>; Tue, 16 Jan 2018 03:48:33 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=/JsqRIZOZ5dQeDrMHpy9UJqZn3SkAxvdkJAsc8+Bh90=; b=Msxqw8dqBtEqrDXxFwUQE+w8N+ngVBKUAaFDku828GDmACns5z/aw48InlkE4ghff+hRjJHhjkpiIxp+4TcOS5OhQ2h2CgBxbzWLzV6KHnIkC7MFNnGJxTX31IVId2SWYyF2yR7NG9mB8gkHAlxLVPt4q87/d4mJAfyHRvdIQRs= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Jianbo.Liu@arm.com; Received: from arm.com (113.29.88.7) by HE1PR0801MB1356.eurprd08.prod.outlook.com (2603:10a6:3:3a::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.407.7; Tue, 16 Jan 2018 02:48:28 +0000 Date: Tue, 16 Jan 2018 10:47:07 +0800 From: Jianbo Liu <jianbo.liu@arm.com> To: Yongseok Koh <yskoh@mellanox.com> Cc: adrien.mazarguil@6wind.com, nelio.laranjeiro@6wind.com, jerin.jacob@caviumnetworks.com, dev@dpdk.org Message-ID: <20180116024706.GA14652@arm.com> References: <20171227042824.33373-1-yskoh@mellanox.com> <20180116011050.18866-1-yskoh@mellanox.com> <20180116011050.18866-2-yskoh@mellanox.com> MIME-Version: 1.0 Content-Type: text/plain; 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> */ > static inline void rte_io_rmb(void); > > +/** > + * Write memory barrier for coherent memory between lcore and IO device > + * > + * Guarantees that the STORE operations on coherent memory that > + * precede the rte_dma_wmb() call are visible to I/O device before the > + * STORE operations that follow it. > + */ > +static inline void rte_dma_wmb(void); > + > +/** > + * Read memory barrier for coherent memory between lcore and IO device > + * > + * Guarantees that the LOAD operations on coherent memory updated by > + * IO device that precede the rte_dma_rmb() call are visible to CPU > + * before the LOAD operations that follow it. > + */ > +static inline void rte_dma_rmb(void); > + > #endif /* __DOXYGEN__ */ > > /** > -- > 2.11.0 > -- IMPORTANT NOTICE: The contents of this email and any attachments are confid= ential and may also be privileged. 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