From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR01-DB5-obe.outbound.protection.outlook.com (mail-db5eur01on0049.outbound.protection.outlook.com [104.47.2.49]) by dpdk.org (Postfix) with ESMTP id BE2F512009 for ; Tue, 16 Jan 2018 10:12:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=zgMaJ1ObbBge20Nb0iEyM8SNFhjxAsrfI/C0PZUw1bs=; b=o7CmH9qnNaTyMfx2+Q0TUtxgTQDTssJiGlBg70per4pl//Qjge+W3Q8+6vsYsMvtht57JCAPFXy0J43RCeGUb4QG0tCMZPiH1LQE2J2k4bXwhcdY8eoLWxxTengtCfXp6FFhQNeWw7D3YcjDh1HFBdgZWb+oWKFGzVnDM51o/sA= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Jianbo.Liu@arm.com; Received: from arm.com (113.29.88.7) by VI1PR0801MB1359.eurprd08.prod.outlook.com (2603:10a6:800:3b::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.407.7; Tue, 16 Jan 2018 09:12:02 +0000 Date: Tue, 16 Jan 2018 17:10:41 +0800 From: Jianbo Liu To: Andrew Rybchenko Cc: Yongseok Koh , adrien.mazarguil@6wind.com, nelio.laranjeiro@6wind.com, jerin.jacob@caviumnetworks.com, dev@dpdk.org Message-ID: <20180116091040.GA15629@arm.com> References: <20171227042824.33373-1-yskoh@mellanox.com> <20180116011050.18866-1-yskoh@mellanox.com> <20180116011050.18866-2-yskoh@mellanox.com> MIME-Version: 1.0 Content-Type: text/plain; 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> > */ > > static inline void rte_io_rmb(void); > >+/** > >+ * Write memory barrier for coherent memory between lcore and IO device > >+ * > >+ * Guarantees that the STORE operations on coherent memory that > >+ * precede the rte_dma_wmb() call are visible to I/O device before the > >+ * STORE operations that follow it. > >+ */ > >+static inline void rte_dma_wmb(void); > >+ > >+/** > >+ * Read memory barrier for coherent memory between lcore and IO device > >+ * > >+ * Guarantees that the LOAD operations on coherent memory updated by > >+ * IO device that precede the rte_dma_rmb() call are visible to CPU > >+ * before the LOAD operations that follow it. > >+ */ > >+static inline void rte_dma_rmb(void); > >+ > > #endif /* __DOXYGEN__ */ > > /** > > I'm not an ARMv8 expert so, my comments could be a bit ignorant. > I'd like to understand the difference between io and added here dma > barriers. > The difference should be clearly explained. Otherwise we'll constantly hi= t > on incorrect choice of barrier type. > Also I don't understand why "dma" name is chosen taking into account > that definition is bound to coherent memory between lcore and IO device. A good explanation can be found here. https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?= id=3D1077fa36f23e259858caf6f269a47393a5aff523 -- IMPORTANT NOTICE: The contents of this email and any attachments are confid= ential and may also be privileged. If you are not the intended recipient, p= lease notify the sender immediately and do not disclose the contents to any= other person, use it for any purpose, or store or copy the information in = any medium. Thank you.