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CY4PR07MB3461; 6:y8wCSdEywWJHQokfm2QTL59y2+pqrNIUCIoqjALn7wvgBjWLcAsbQwnWOHDIH1SdQK74st7IXcjTAt5ft3ZPaC38QGQkZE8LKRtAcfuE2CK4q/pb+8kyPe9mDe7t1PLa5vWWAuqXZTs62wmJYntI34zlH+AoxvnAF1ZFtoR2Z0ysg4Za6TEwmFtzejOrV7MdalvBZ94UhIO5SjlpYk7l52RH0EJAgKhpFFelyi4LFjyjNpqovsD2ZFOcycNP7RXdTtHZvYW9yK85WR2Gz94Vt12vDEbMYc1IhkvZ1T9hLDbmd2k334eLom3FuEmtSnBcKBomLe3btRt+rEUmaSzkmWpWq9HDFTljIH9GpKN7YWw=; 5:tOv2HScjK3fYcHRTGsmXKMXZxEDFoaZJ37NZjnxICHle4Mie1fngW0qCaXJvWWRNmXvvE9xbTr55CvsexYmpE1ei1BCQWPIcFBwHtlswREGXoXf1fsFsow2nc3Bc/dV3knZlB3WX8VQ9K0rpzto9rHGxUrXAGL47gWGHw9TCy4o=; 24:ZihD7pXmi54fsUM1ex6GWZQlNzIY/edv7T40JZJVwY/xZyfjlrm1oHmt4+QaXkKqCqr6CjdiYEQAe9BVG4rRV4aPG0IvXODNZykfwdtTpUo=; 7:um2tE70dOyOT/QH0Xjq4cu+fc1rj6VoaJ019QCsOx9DZoEHVr01LKaKQUMHsY/35IxsIinlAA6ft6CcySaGHK4F+/Vy86YEoTRZjNpWKLsRwFpu1YLG25O/saHCwDmvZMSixbqTOwvsw31AJdD9q1sc9Y2XwC0wtPHcOWpxMaknqbCTaAekhwX2ipysS3KzRDW4XIRg6wQQR/8LnD/00OcJ7Ue/nnYpkSJbsJjpMRc4KkDVJqCq8cSMnQFSG5Nhx SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2018 09:22:57.8082 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 54f73fe4-14c4-4534-1cde-08d56c7a0cca X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR07MB3461 Subject: Re: [dpdk-dev] [PATCH v1] build: add more implementers' IDs and PNs for Arm platforms X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Feb 2018 09:23:02 -0000 Hi Herbert, On Wed, Jan 31, 2018 at 03:39:19PM +0800, Herbert Guan wrote: > 1) Add native PN option '-march=native' to allow automatic detection. > Set 'arm_force_native_march' to 'true' in config/arm/meson.build > to use native PN option. > 2) Add implementer_pn option for part num selection in cross compile > 3) Add known Arm cortex PN support > 4) Add known implementers' IDs (use generic flags/archs by default) > 5) Sync build options with config/common_armv8a_linuxapp > > Signed-off-by: Herbert Guan > --- > + > machine_args_generic = [ > - ['default', ['-march=armv8-a+crc+crypto']]] > + ['default', ['-march=armv8-a']], Any specific reason for this change? Traditional make uses MACHINE_CFLAGS += -march=armv8-a+crc+crypto found at mk/machine/armv8a/rte.vars.mk > + ['native', ['-march=native']], > + ['0xd03', ['-mcpu=cortex-a53']], > + ['0xd04', ['-mcpu=cortex-a35']], > + ['0xd07', ['-mcpu=cortex-a57']], > + ['0xd08', ['-mcpu=cortex-a72']], > + ['0xd09', ['-mcpu=cortex-a73']], > + ['0xd0a', ['-mcpu=cortex-a75']], > +] > machine_args_cavium = [ > ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], > + ['native', ['-march=native']], > ['0xa1', ['-mcpu=thunderxt88']], > ['0xa2', ['-mcpu=thunderxt81']], > ['0xa3', ['-mcpu=thunderxt83']]] > > -flags_generic = [[]] > +flags_common_default = [ > + # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) > + # to determine the best threshold in code. Refer to notes in source file > + # (lib/librte_eal/common/include/arch/arm/rte_memcpy_64.h) for more info. > + ['RTE_ARCH_ARM64_MEMCPY', false], > + # ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048], > + # ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512], > + # Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're > + # strong reasons. > + # ['RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK', false], > + # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], > + # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], > + > + ['RTE_LIBRTE_FM10K_PMD', false], > + ['RTE_LIBRTE_SFC_EFX_PMD', false], > + ['RTE_LIBRTE_AVP_PMD', false], > + > + ['RTE_SCHED_VECTOR', false], > +] > + > +flags_generic = [ > + ['RTE_MACHINE', '"armv8a"'], > + ['RTE_CACHE_LINE_SIZE', 128]] > flags_cavium = [ > ['RTE_MACHINE', '"thunderx"'], > ['RTE_CACHE_LINE_SIZE', 128], > @@ -22,8 +55,21 @@ flags_cavium = [ > ['RTE_MAX_VFIO_GROUPS', 128], > ['RTE_RING_USE_C11_MEM_MODEL', false]] > > +## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) > impl_generic = ['Generic armv8', flags_generic, machine_args_generic] > +impl_0x41 = ['Arm', flags_generic, machine_args_generic] > +impl_0x42 = ['Broadcom', flags_generic, machine_args_generic] > impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium] > +impl_0x44 = ['DEC', flags_generic, machine_args_generic] > +impl_0x49 = ['Infineon', flags_generic, machine_args_generic] > +impl_0x4d = ['Motorola', flags_generic, machine_args_generic] > +impl_0x4e = ['NVIDIA', flags_generic, machine_args_generic] > +impl_0x50 = ['AppliedMicro', flags_generic, machine_args_generic] > +impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic] > +impl_0x53 = ['Samsung', flags_generic, machine_args_generic] > +impl_0x56 = ['Marvell', flags_generic, machine_args_generic] > +impl_0x69 = ['Intel', flags_generic, machine_args_generic] > + > One minor concern here is DPAA/DPAA2 use cacheline size og 64B unlike traditional 128B armv8. found at config/defconfig_arm64-dpaa/2-linuxapp-gcc maybe Hemanth could comment on this. > if cc.get_define('__clang__') != '' > dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'clang') > @@ -55,19 +101,31 @@ else > meson.current_source_dir(), 'armv8_machine.py')) > cmd = run_command(detect_vendor.path()) > if cmd.returncode() == 0 > - cmd_output = cmd.stdout().strip().split(' ') > + cmd_output = cmd.stdout().to_lower().strip().split(' ') > endif Verified on thunderx with gcc 5.3.0/7.2.1 and clang 5.0.1 Regards, Pavan > @@ -79,22 +137,19 @@ else > # for gcc versions > 7 > if cc.version().version_compare( > '<7.0') or cmd_output.length() == 0 > - foreach marg: machine[2] > - if marg[0] == 'default' > - foreach f: marg[1] > - machine_args += f > - endforeach > - endif > - endforeach > - else > - foreach marg: machine[2] > - if marg[0] == cmd_output[3] > - foreach f: marg[1] > - machine_args += f > - endforeach > - endif > - endforeach > + if not meson.is_cross_build() and arm_force_native_march == true > + impl_pn = 'native' > + else > + impl_pn = 'default' > + endif > endif > + foreach marg: machine[2] > + if marg[0] == impl_pn > + foreach f: marg[1] > + machine_args += f > + endforeach > + endif > + endforeach > endif > message(machine_args) > > -- > 1.8.3.1 >