From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-f194.google.com (mail-wr0-f194.google.com [209.85.128.194]) by dpdk.org (Postfix) with ESMTP id CA2424CBB for ; Tue, 6 Mar 2018 11:46:36 +0100 (CET) Received: by mail-wr0-f194.google.com with SMTP id m12so20384655wrm.13 for ; Tue, 06 Mar 2018 02:46:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to :user-agent; bh=IV3QWUVVINfqIWtLaAj3BTUWIJdnBzZ5jlYM/nOraS4=; b=NqyZgXYK3g7Mn9crbS1Zc3F0bN8kvj2Zkrv2hKKFxPrGUJu/E61kUlBQQ3feJgwrKo gf4q586tB5Dat0+G+2qJ5MYv3cXt9U3rdfQY1jZS2B3hekeTWGcm+C3JHV80nt9MeJqp jYedo3hcTWR6ctt+bOrAKvigIThIaKrhNwlqLHunX3XSmZrIXWOD49FeVyxYRlaZJMVK ttIegwoM0xEFSsdXscNRhBcEWq2keDu/esxp+xFZB4uEVA2ZtxQc2fh0YPa9+u8YDdyQ NbyarHpyZ5PIGhQjUex9lLalwJJE3RQybClV5Qr+vWmpoUZNl6FCKXyuKLa2XfUzUzLX yCDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to:user-agent; bh=IV3QWUVVINfqIWtLaAj3BTUWIJdnBzZ5jlYM/nOraS4=; b=IbKMzRKLdm+/shp7MlstCVCpr70CJqg8PC3uIs19EHrgHYelJn9+2JRoCRRV2N2c/7 gaW+hTlKkzILZ8AxL4gV941cNhm+S16hfOxu9eswA0d16NlX4hoedczikOdvqGTgm1OD XWewaNqZF6I6EGc3fxRZI72GXxfY3C+G0M40LA2wMiMQ+iL5cv04mIJZcCshyCRdXH+t qbdYQUng5PBrlKfSfvr53u5DEFL6LIvBlktt/K9Nhe3W+JaSMxynT5AX8echjplh2BxW RFelxzsnGndwk2y1zFUTcBWdo7nenoojtegNmfR/E9Odzl+P9piwnpRSC3Gq4RZHxQmg T40g== X-Gm-Message-State: APf1xPDEh0Y1Qx6QXMuoiaJVxeD1xESdzquxWPqE2Kaa/uL9hNfCg25J X1aj9MN9WDwmzbWYBB8Y9UXAyCni X-Google-Smtp-Source: AG47ELtpCrPa0YzcWRf+nQPQXmoyM6kGWABCk09bYj9j2PANU0hAQ1sevEVROkGVW9To+91glP/BiQ== X-Received: by 10.223.139.144 with SMTP id o16mr14917896wra.279.1520333196424; Tue, 06 Mar 2018 02:46:36 -0800 (PST) Received: from bidouze.vm.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id r71sm12681685wmd.48.2018.03.06.02.46.35 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 06 Mar 2018 02:46:35 -0800 (PST) Date: Tue, 6 Mar 2018 11:46:22 +0100 From: =?iso-8859-1?Q?Ga=EBtan?= Rivet To: "Xu, Rosen" Cc: Shreyansh Jain , "dev@dpdk.org" , "Doherty, Declan" , "Zhang, Tianfei" Message-ID: <20180306104622.3ngsn6syickaphbm@bidouze.vm.6wind.com> References: <1520300638-134954-1-git-send-email-rosen.xu@intel.com> <1520300638-134954-4-git-send-email-rosen.xu@intel.com> <0E78D399C70DA940A335608C6ED296D739F0ED23@SHSMSX104.ccr.corp.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <0E78D399C70DA940A335608C6ED296D739F0ED23@SHSMSX104.ccr.corp.intel.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [dpdk-dev] [RFC 3/4] lib/librte_eal/common: Add Intel FPGA Bus Second Scan, it should be scanned after PCI Bus X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Mar 2018 10:46:36 -0000 On Tue, Mar 06, 2018 at 10:42:14AM +0000, Xu, Rosen wrote: > > > -----Original Message----- > From: Shreyansh Jain [mailto:shreyansh.jain@nxp.com] > Sent: Tuesday, March 06, 2018 14:20 > To: Xu, Rosen > Cc: dev@dpdk.org; Doherty, Declan ; Zhang, Tianfei > Subject: Re: [dpdk-dev] [RFC 3/4] lib/librte_eal/common: Add Intel FPGA Bus Second Scan, it should be scanned after PCI Bus > > On Tue, Mar 6, 2018 at 7:13 AM, Rosen Xu wrote: > > Signed-off-by: Rosen Xu > > --- > > lib/librte_eal/common/eal_common_bus.c | 14 +++++++++++++- > > 1 file changed, 13 insertions(+), 1 deletion(-) > > > > diff --git a/lib/librte_eal/common/eal_common_bus.c > > b/lib/librte_eal/common/eal_common_bus.c > > index 3e022d5..74bfa15 100644 > > --- a/lib/librte_eal/common/eal_common_bus.c > > +++ b/lib/librte_eal/common/eal_common_bus.c > > @@ -70,15 +70,27 @@ struct rte_bus_list rte_bus_list = > > rte_bus_scan(void) > > { > > int ret; > > - struct rte_bus *bus = NULL; > > + struct rte_bus *bus = NULL, *ifpga_bus = NULL; > > > > TAILQ_FOREACH(bus, &rte_bus_list, next) { > > + if (!strcmp(bus->name, "ifpga")) { > > + ifpga_bus = bus; > > + continue; > > + } > > + > > ret = bus->scan(); > > if (ret) > > RTE_LOG(ERR, EAL, "Scan for (%s) bus failed.\n", > > bus->name); > > } > > > > + if (ifpga_bus) { > > + ret = ifpga_bus->scan(); > > + if (ret) > > + RTE_LOG(ERR, EAL, "Scan for (%s) bus failed.\n", > > + ifpga_bus->name); > > + } > > + > > You are doing this just so that PCI scans are completed *before* ifpga scans? > Rosen: yes > Well, I understand that this certainly is an issue that we can't yet define a priority ordering of bus scans. > > But, I think what you are require is a simpler: > > In the file ifpga_bus.c: > > +RTE_REGISTER_BUS(IFPGA_BUS_NAME, rte_ifpga_bus.bus); <== this > ... > ... > #define RTE_REGISTER_BUS(nm, bus) \ > RTE_INIT_PRIO(businitfn_ ##nm, 110); \ > > If you define your own version of RTE_REGISTER_BUS with the priority number higher, it would be inserted later in the bus list. > rte_register_bus doesn't do any inherent ordering. > This would save the changes you are doing in the lib/librte_eal/common/eal_common_bus.c file. > > But I think there has to be a better provision of defining priority of bus scans - I am sure when new devices come in, there would be possibility of dependencies as in your case. > Rosen: is the priority scan of bus is implemented? No, there is no priority set for scanning order. However, the order in which buses are registered, will modify the order in which scans are done. Thus, if you change the priority of your registration, you should be able to ensure that your scan comes last. > > > return 0; > > } > > > > -- > > 1.8.3.1 > > -- Gaëtan Rivet 6WIND