From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id D04FFAAA2 for ; Wed, 21 Mar 2018 08:28:08 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Mar 2018 00:28:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,339,1517904000"; d="scan'208";a="25741709" Received: from dpdk51.sh.intel.com ([10.67.110.184]) by fmsmga007.fm.intel.com with ESMTP; 21 Mar 2018 00:28:07 -0700 From: Qi Zhang To: thomas@monjalon.net, konstantin.ananyev@intel.com Cc: dev@dpdk.org, beilei.xing@intel.com, jingjing.wu@intel.com, wenzhuo.lu@intel.com, Qi Zhang Date: Wed, 21 Mar 2018 15:28:07 +0800 Message-Id: <20180321072807.268266-4-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180321072807.268266-1-qi.z.zhang@intel.com> References: <20180212045314.171616-1-qi.z.zhang@intel.com> <20180321072807.268266-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v3 3/3] net/i40e: enable runtime queue setup X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Mar 2018 07:28:09 -0000 Expose the runtime queue configuration capability and enhance i40e_dev_[rx|tx]_queue_setup to handle the situation when device already started. Signed-off-by: Qi Zhang --- v3: - no queue start/stop in setup/release - return fail when required rx/tx function conflict with exist setup drivers/net/i40e/i40e_ethdev.c | 4 +++ drivers/net/i40e/i40e_rxtx.c | 64 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 508b4171c..68960dcaa 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -3197,6 +3197,10 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_TX_OFFLOAD_GRE_TNL_TSO | DEV_TX_OFFLOAD_IPIP_TNL_TSO | DEV_TX_OFFLOAD_GENEVE_TNL_TSO; + dev_info->runtime_queue_setup_capa = + DEV_RUNTIME_RX_QUEUE_SETUP | + DEV_RUNTIME_TX_QUEUE_SETUP; + dev_info->hash_key_size = (I40E_PFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t); dev_info->reta_size = pf->hash_lut_size; diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index 1217e5a61..9eb009d63 100644 --- a/drivers/net/i40e/i40e_rxtx.c +++ b/drivers/net/i40e/i40e_rxtx.c @@ -1712,6 +1712,7 @@ i40e_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t len, i; uint16_t reg_idx, base, bsf, tc_mapping; int q_offset, use_def_burst_func = 1; + int ret = 0; if (hw->mac.type == I40E_MAC_VF || hw->mac.type == I40E_MAC_X722_VF) { vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); @@ -1841,6 +1842,36 @@ i40e_dev_rx_queue_setup(struct rte_eth_dev *dev, rxq->dcb_tc = i; } + if (dev->data->dev_started) { + ret = i40e_rx_queue_init(rxq); + if (ret != I40E_SUCCESS) { + PMD_DRV_LOG(ERR, + "Failed to do RX queue initialization"); + return ret; + } + /* check vector conflict */ + if (ad->rx_vec_allowed) { + if (i40e_rxq_vec_setup(rxq)) { + PMD_DRV_LOG(ERR, "Failed vector rx setup"); + i40e_dev_rx_queue_release(rxq); + return -EINVAL; + } + } + /* check scatterred conflict */ + if (!dev->data->scattered_rx) { + uint16_t buf_size = + (uint16_t)(rte_pktmbuf_data_room_size(rxq->mp) - + RTE_PKTMBUF_HEADROOM); + + if ((rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > + buf_size) { + PMD_DRV_LOG(ERR, "Scattered rx is required"); + i40e_dev_rx_queue_release(rxq); + return -EINVAL; + } + } + } + return 0; } @@ -1980,6 +2011,8 @@ i40e_dev_tx_queue_setup(struct rte_eth_dev *dev, const struct rte_eth_txconf *tx_conf) { struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); + struct i40e_adapter *ad = + I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); struct i40e_vsi *vsi; struct i40e_pf *pf = NULL; struct i40e_vf *vf = NULL; @@ -1989,6 +2022,7 @@ i40e_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_rs_thresh, tx_free_thresh; uint16_t reg_idx, i, base, bsf, tc_mapping; int q_offset; + int ret = 0; if (hw->mac.type == I40E_MAC_VF || hw->mac.type == I40E_MAC_X722_VF) { vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); @@ -2162,6 +2196,36 @@ i40e_dev_tx_queue_setup(struct rte_eth_dev *dev, txq->dcb_tc = i; } + if (dev->data->dev_started) { + ret = i40e_tx_queue_init(txq); + if (ret != I40E_SUCCESS) { + PMD_DRV_LOG(ERR, + "Failed to do TX queue initialization"); + return ret; + } + + /* check vector conflict */ + if (ad->tx_vec_allowed) { + if (txq->tx_rs_thresh > RTE_I40E_TX_MAX_FREE_BUF_SZ || + i40e_txq_vec_setup(txq)) { + PMD_DRV_LOG(ERR, "Failed vector tx setup"); + i40e_dev_tx_queue_release(txq); + return -EINVAL; + } + } + + /* check simple tx conflict */ + if (ad->tx_simple_allowed) { + if (((txq->txq_flags & I40E_SIMPLE_FLAGS) != + I40E_SIMPLE_FLAGS) || + (txq->tx_rs_thresh < RTE_PMD_I40E_TX_MAX_BURST)) { + } + PMD_DRV_LOG(ERR, "No-simple tx is required"); + i40e_dev_tx_queue_release(txq); + return -EINVAL; + } + } + return 0; } -- 2.13.6