From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl0-f66.google.com (mail-pl0-f66.google.com [209.85.160.66]) by dpdk.org (Postfix) with ESMTP id C3F35160 for ; Mon, 23 Jul 2018 18:52:55 +0200 (CEST) Received: by mail-pl0-f66.google.com with SMTP id z7-v6so467590plo.9 for ; Mon, 23 Jul 2018 09:52:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6hRo6iRIoyaXGUSjvqtaF8xA8rsZSHYv0g1/bUAsgsc=; b=cc+G5HUeKFrQjESS0SvExY20ujZhtyFEO79XhkS0PqkkoiqnVk84D8bw0f3t8Efr15 MFvacyerBPnVIjiV+/t6WyLchC6pOyauO3kYamunlE15rQLDzmRP4W8E0aDBzzmNODJj wzSDCn5U7kA4LtqHp6fUMsMoIUT8xlBylD2yZDTmz66yaVTORGwaklaVYTZ8Eqb6CxzI r2qZ9E7nyT7WFjElRMjqPWLTadug6KGtvgiRQwCkY504xT7t1SLefCuokBP8EsK8aj+N LXHPNBWgpz0e9Dx2wWFy45V18nWLgh5dRNbpFDEmr3AfaKh0U7RDv5qP5C0CmwCSUJPk yL5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6hRo6iRIoyaXGUSjvqtaF8xA8rsZSHYv0g1/bUAsgsc=; b=CSGTXbrWzjZHxcPFcgBht0Pkt9vQUQU4YIUJAfTXNFG4n/f+24M1CCG5jVSsu8xBII 57fdhXdkgauHCNDGtH1NV97KUddgO1dsT5kBcUxS4tgnTmtan/vLCUQdyRHZQhu5wXn0 5c7nhzRof8i1cjDG0MgBMQfRMLzKUKJw+kJkH8anzktsoxMDgAVdO0OfMrBrsaE3BKri 32w5K1uACtiRqy/nZ0eUcULl2woZHLBdnwEHC1AZxNDaAxjtGAQ/WimlNuxxcZDplJjw AudCW2bBf7/htjUL9ce/lYVsKHdd0MXLYDJdxR4dFGLWP4te3GK9bFz9U6ES6KCdwKKO m7fA== X-Gm-Message-State: AOUpUlH76deKAa6pdrpVoDSYFuB6MuAf2ikXCrlphUSmZeYQm+zVojrR bs98VuKmO6ZwlCRqJWs2hETK0w== X-Google-Smtp-Source: AAOMgpfUm+xHlYkzKvnJe5CL4Xn6/UZd/pyF56WV845oXzgsCGAsuQQYH/OEMGfTb0mvRRO2gzMuHQ== X-Received: by 2002:a17:902:da4:: with SMTP id 33-v6mr13447675plv.193.1532364774991; Mon, 23 Jul 2018 09:52:54 -0700 (PDT) Received: from xeon-e3 (204-195-22-127.wavecable.com. [204.195.22.127]) by smtp.gmail.com with ESMTPSA id d81-v6sm24292522pfj.122.2018.07.23.09.52.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 23 Jul 2018 09:52:54 -0700 (PDT) Date: Mon, 23 Jul 2018 09:52:52 -0700 From: Stephen Hemminger To: alangordondewar@gmail.com Cc: cristian.dumitrescu@intel.com, dev@dpdk.org, Alan Dewar Message-ID: <20180723095252.4a93ea91@xeon-e3> In-Reply-To: <1531925499-938-1-git-send-email-alan.dewar@att.com> References: <1531925499-938-1-git-send-email-alan.dewar@att.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH] sched: add 64-bit counter retrieval API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 23 Jul 2018 16:52:56 -0000 On Wed, 18 Jul 2018 15:51:39 +0100 alangordondewar@gmail.com wrote: > From: Alan Dewar > > Add new APIs to retrieve counters in 64-bit wide fields. > > Signed-off-by: Alan Dewar Do you want to consider 64 bit counter roll over on 32 bit platform? The problem is that incrementing an 64 bit value is not atomic on 32 bit cpu. The carry operation can race with reading. The kernel has special case code to do restartable sequence for accessing 64 bit counter on 32 bit CPU. These functions become nop's on 64bit.