From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 90B8A2C72 for ; Mon, 27 Aug 2018 07:31:59 +0200 (CEST) X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Aug 2018 22:31:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,293,1531810800"; d="scan'208";a="68345873" Received: from fbsd.sh.intel.com ([10.67.104.228]) by orsmga008.jf.intel.com with ESMTP; 26 Aug 2018 22:31:50 -0700 Date: Mon, 27 Aug 2018 13:29:34 +0800 From: Tiwei Bie To: Luca Boccassi Cc: dev@dpdk.org, maxime.coquelin@redhat.com, zhihong.wang@intel.com, bruce.richardson@intel.com, brian.russell@intl.att.com Message-ID: <20180827052934.GA34061@fbsd.sh.intel.com> References: <20180820164421.28763-1-bluca@debian.org> <20180824171420.31246-1-bluca@debian.org> <20180824171420.31246-2-bluca@debian.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20180824171420.31246-2-bluca@debian.org> User-Agent: Mutt/1.10.1 (2018-07-13) Subject: Re: [dpdk-dev] [PATCH v4 2/2] virtio: fix PCI config err handling X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Aug 2018 05:32:00 -0000 On Fri, Aug 24, 2018 at 06:14:20PM +0100, Luca Boccassi wrote: > From: Brian Russell > > In virtio_read_caps and vtpci_msix_detect, rte_pci_read_config returns > the number of bytes read from PCI config or < 0 on error. > If less than the expected number of bytes are read then log the > failure and return rather than carrying on with garbage. > > Fixes: 6ba1f63b5ab0 ("virtio: support specification 1.0") > > Signed-off-by: Brian Russell > Signed-off-by: Luca Boccassi > --- > v2: handle additional rte_pci_read_config incomplete reads > v3: do not handle rte_pci_read_config of virtio cap, added in v2, > as it's less clear what the right thing to do there is > v4: do a more robust check - first check what the vendor is, and > skip the cap entirely if it's not what we are looking for. > > drivers/net/virtio/virtio_pci.c | 57 ++++++++++++++++++++++++--------- > 1 file changed, 42 insertions(+), 15 deletions(-) > > diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c > index 6bd22e54a6..cfefa9789b 100644 > --- a/drivers/net/virtio/virtio_pci.c > +++ b/drivers/net/virtio/virtio_pci.c > @@ -567,16 +567,30 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw) > } > > ret = rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST); > - if (ret < 0) { > - PMD_INIT_LOG(DEBUG, "failed to read pci capability list"); > + if (ret != 1) { > + PMD_INIT_LOG(DEBUG, > + "failed to read pci capability list, ret %d", ret); > return -1; > } > > while (pos) { > + ret = rte_pci_read_config(dev, &cap, 2, pos); > + if (ret != 2) { > + PMD_INIT_LOG(DEBUG, > + "failed to read pci cap at pos: %x ret %d", > + pos, ret); > + break; > + } > + if (cap.cap_vndr != PCI_CAP_ID_MSIX && > + cap.cap_vndr != PCI_CAP_ID_VNDR) { > + goto next; > + } > + > ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos); > - if (ret < 0) { > - PMD_INIT_LOG(ERR, > - "failed to read pci cap at pos: %x", pos); > + if (ret != sizeof(cap)) { > + PMD_INIT_LOG(DEBUG, > + "failed to read pci cap at pos: %x ret %d", > + pos, ret); > break; > } > It seems that I didn't make myself clear in my previous comments. I mean it's better to handle MSIX cap and virtio cap respectively in this function. Currently we're always reading them as virtio caps. As we are strictly requiring that _read_config() should return the required number of bytes, it's not perfect to require it to return "virtio cap size" of bytes while we're trying to read a MSIX cap. So please change the code to something similar to this: while (pos) { ret = rte_pci_read_config(dev, &cap, 2, pos); if (ret != 2) { PMD_INIT_LOG(DEBUG, "failed to read pci cap at pos: %x ret %d", pos, ret); break; } if (cap.cap_vndr == PCI_CAP_ID_MSIX) { /* Transitional devices would also have this capability, * that's why we also check if msix is enabled. * 1st byte is cap ID; 2nd byte is the position of next * cap; next two bytes are the flags. */ uint16_t flags; ret = rte_pci_read_config(dev, &flags, sizeof(flags), pos + 2); if (ret != sizeof(flags)) { PMD_INIT_LOG(DEBUG, "failed to read pci cap at pos: %x ret %d", pos + 2, ret); break; } if (flags & PCI_MSIX_ENABLE) hw->use_msix = VIRTIO_MSIX_ENABLED; else hw->use_msix = VIRTIO_MSIX_DISABLED; } if (cap.cap_vndr != PCI_CAP_ID_VNDR) { PMD_INIT_LOG(DEBUG, "[%2x] skipping non VNDR cap id: %02x", pos, cap.cap_vndr); goto next; } ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos); if (ret != sizeof(cap)) { PMD_INIT_LOG(DEBUG, "failed to read pci cap at pos: %x ret %d", pos, ret); break; } PMD_INIT_LOG(DEBUG, "[%2x] cfg type: %u, bar: %u, offset: %04x, len: %u", pos, cap.cfg_type, cap.bar, cap.offset, cap.length); switch (cap.cfg_type) { ...... > @@ -689,25 +703,38 @@ enum virtio_msix_status > vtpci_msix_detect(struct rte_pci_device *dev) > { > uint8_t pos; > - struct virtio_pci_cap cap; > int ret; > > ret = rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST); > - if (ret < 0) { > - PMD_INIT_LOG(DEBUG, "failed to read pci capability list"); > + if (ret != 1) { > + PMD_INIT_LOG(DEBUG, > + "failed to read pci capability list, ret %d", ret); > return VIRTIO_MSIX_NONE; > } > > while (pos) { > - ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos); > - if (ret < 0) { > - PMD_INIT_LOG(ERR, > - "failed to read pci cap at pos: %x", pos); > + uint8_t cap[2]; > + > + ret = rte_pci_read_config(dev, cap, sizeof(cap), pos); > + if (ret != sizeof(cap)) { > + PMD_INIT_LOG(DEBUG, > + "failed to read pci cap at pos: %x ret %d", > + pos, ret); > break; > } > > - if (cap.cap_vndr == PCI_CAP_ID_MSIX) { > - uint16_t flags = ((uint16_t *)&cap)[1]; > + if (cap[0] == PCI_CAP_ID_MSIX) { > + uint16_t flags; > + > + ret = rte_pci_read_config(dev, &flags, sizeof(flags), > + pos + sizeof(cap)); > + if (ret != sizeof(flags)) { > + PMD_INIT_LOG(DEBUG, > + "failed to read pci cap at pos:" > + " %x ret %d", pos + sizeof(cap), There is a build error: In file included from drivers/net/virtio/virtio_pci.c:15: drivers/net/virtio/virtio_pci.c: In function ‘vtpci_msix_detect’: drivers/net/virtio/virtio_logs.h:13:3: error: format ‘%x’ expects argument of type ‘unsigned int’, but argument 5 has type ‘long unsigned int’ [-Werror=format=] "%s(): " fmt "\n", __func__, ##args) ^~~~~~~~ drivers/net/virtio/virtio_pci.c:732:5: note: in expansion of macro ‘PMD_INIT_LOG’ PMD_INIT_LOG(DEBUG, ^~~~~~~~~~~~ drivers/net/virtio/virtio_pci.c:734:14: note: format string is defined here " %x ret %d", pos + sizeof(cap), ~^ %lx > + ret); > + break; > + } > > if (flags & PCI_MSIX_ENABLE) > return VIRTIO_MSIX_ENABLED; > @@ -715,7 +742,7 @@ vtpci_msix_detect(struct rte_pci_device *dev) > return VIRTIO_MSIX_DISABLED; > } > > - pos = cap.cap_next; > + pos = cap[1]; > } > > return VIRTIO_MSIX_NONE; > -- > 2.18.0 >