From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f68.google.com (mail-wm0-f68.google.com [74.125.82.68]) by dpdk.org (Postfix) with ESMTP id A788A5A6E for ; Mon, 27 Aug 2018 18:52:46 +0200 (CEST) Received: by mail-wm0-f68.google.com with SMTP id s12-v6so8762036wmc.0 for ; Mon, 27 Aug 2018 09:52:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jwQ9Dg5Hsw/zxND+vMBH8Gm313XkVdRFtWfVchfiI0Y=; b=somMmBIDzjo0xovagTkIlJOV3gVMiaW1FfFJ+6u4WG4i9MIzgm5AL2PtxC/lDWs++Y AFx8wRel4v3GIVEgJblIVy9s1luPuTtBEAd9WXWfWty9hiq+l0aL5xqogPP8sy1rQDA0 2TLHONb3o999c97SLXBqmKNKMVPLF0Nu/5ddxlzJa7eXQwbjpWv6FtiFTZqkmj0yHCxg Fb2QI2UIsgH9lva4jyUN68lekBzA2PpcVl31cziGNJoDdEJecWXzL+VbQNvrPYnUOnKE o0NtAdBHiknwl8MS/7PRE4jzp6a7Oe3z4r6ynABqSVRgjnBM3idJx+ZS4BYS4F3NYPMn YSRw== X-Gm-Message-State: APzg51AV+17Bsqc41aK76yIxelBNJoHcCJKSyDwHgNqbLDDDkyAzXrA9 ma8byyDV7LsA0yZzKS/upH03S7e3 X-Google-Smtp-Source: ANB0VdZAJnTqtkHWBSu7PBkWa5qTqOE4M1rbIyJL3clSG/BdE1ygthX+zafLo7KfbBMTz5g6Pae9gg== X-Received: by 2002:a1c:8145:: with SMTP id c66-v6mr3617236wmd.139.1535388765994; Mon, 27 Aug 2018 09:52:45 -0700 (PDT) Received: from localhost ([2a01:4b00:f419:6f00:8361:8946:ba2b:d556]) by smtp.gmail.com with ESMTPSA id v6-v6sm8523996wmc.43.2018.08.27.09.52.44 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 27 Aug 2018 09:52:44 -0700 (PDT) From: Luca Boccassi To: dev@dpdk.org Cc: maxime.coquelin@redhat.com, zhihong.wang@intel.com, tiwei.bie@intel.com, bruce.richardson@intel.com, Brian Russell , Luca Boccassi Date: Mon, 27 Aug 2018 17:52:40 +0100 Message-Id: <20180827165240.28322-2-bluca@debian.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180827165240.28322-1-bluca@debian.org> References: <20180824171420.31246-1-bluca@debian.org> <20180827165240.28322-1-bluca@debian.org> Subject: [dpdk-dev] [PATCH v5 2/2] virtio: fix PCI config err handling X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Aug 2018 16:52:47 -0000 From: Brian Russell In virtio_read_caps and vtpci_msix_detect, rte_pci_read_config returns the number of bytes read from PCI config or < 0 on error. If less than the expected number of bytes are read then log the failure and return rather than carrying on with garbage. Fixes: 6ba1f63b5ab0 ("virtio: support specification 1.0") Signed-off-by: Brian Russell Signed-off-by: Luca Boccassi --- v2: handle additional rte_pci_read_config incomplete reads v3: do not handle rte_pci_read_config of virtio cap, added in v2, as it's less clear what the right thing to do there is v4: do a more robust check - first check what the vendor is, and skip the cap entirely if it's not what we are looking for. v5: fetch only 2 flags bytes if the vndr is PCI_CAP_ID_MSIX drivers/net/virtio/virtio_pci.c | 66 ++++++++++++++++++++++++--------- 1 file changed, 49 insertions(+), 17 deletions(-) diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c index 6bd22e54a6..e900254a12 100644 --- a/drivers/net/virtio/virtio_pci.c +++ b/drivers/net/virtio/virtio_pci.c @@ -567,16 +567,18 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw) } ret = rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST); - if (ret < 0) { - PMD_INIT_LOG(DEBUG, "failed to read pci capability list"); + if (ret != 1) { + PMD_INIT_LOG(DEBUG, + "failed to read pci capability list, ret %d", ret); return -1; } while (pos) { - ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos); - if (ret < 0) { - PMD_INIT_LOG(ERR, - "failed to read pci cap at pos: %x", pos); + ret = rte_pci_read_config(dev, &cap, 2, pos); + if (ret != 2) { + PMD_INIT_LOG(DEBUG, + "failed to read pci cap at pos: %x ret %d", + pos, ret); break; } @@ -586,7 +588,16 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw) * 1st byte is cap ID; 2nd byte is the position of next * cap; next two bytes are the flags. */ - uint16_t flags = ((uint16_t *)&cap)[1]; + uint16_t flags; + + ret = rte_pci_read_config(dev, &flags, sizeof(flags), + pos + 2); + if (ret != sizeof(flags)) { + PMD_INIT_LOG(DEBUG, + "failed to read pci cap at pos:" + " %x ret %d", pos + 2, ret); + break; + } if (flags & PCI_MSIX_ENABLE) hw->use_msix = VIRTIO_MSIX_ENABLED; @@ -601,6 +612,14 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw) goto next; } + ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos); + if (ret != sizeof(cap)) { + PMD_INIT_LOG(DEBUG, + "failed to read pci cap at pos: %x ret %d", + pos, ret); + break; + } + PMD_INIT_LOG(DEBUG, "[%2x] cfg type: %u, bar: %u, offset: %04x, len: %u", pos, cap.cfg_type, cap.bar, cap.offset, cap.length); @@ -689,25 +708,38 @@ enum virtio_msix_status vtpci_msix_detect(struct rte_pci_device *dev) { uint8_t pos; - struct virtio_pci_cap cap; int ret; ret = rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST); - if (ret < 0) { - PMD_INIT_LOG(DEBUG, "failed to read pci capability list"); + if (ret != 1) { + PMD_INIT_LOG(DEBUG, + "failed to read pci capability list, ret %d", ret); return VIRTIO_MSIX_NONE; } while (pos) { - ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos); - if (ret < 0) { - PMD_INIT_LOG(ERR, - "failed to read pci cap at pos: %x", pos); + uint8_t cap[2]; + + ret = rte_pci_read_config(dev, cap, sizeof(cap), pos); + if (ret != sizeof(cap)) { + PMD_INIT_LOG(DEBUG, + "failed to read pci cap at pos: %x ret %d", + pos, ret); break; } - if (cap.cap_vndr == PCI_CAP_ID_MSIX) { - uint16_t flags = ((uint16_t *)&cap)[1]; + if (cap[0] == PCI_CAP_ID_MSIX) { + uint16_t flags; + + ret = rte_pci_read_config(dev, &flags, sizeof(flags), + pos + sizeof(cap)); + if (ret != sizeof(flags)) { + PMD_INIT_LOG(DEBUG, + "failed to read pci cap at pos:" + " %lx ret %d", pos + sizeof(cap), + ret); + break; + } if (flags & PCI_MSIX_ENABLE) return VIRTIO_MSIX_ENABLED; @@ -715,7 +747,7 @@ vtpci_msix_detect(struct rte_pci_device *dev) return VIRTIO_MSIX_DISABLED; } - pos = cap.cap_next; + pos = cap[1]; } return VIRTIO_MSIX_NONE; -- 2.18.0