From: Qi Zhang <qi.z.zhang@intel.com>
To: beilei.xing@intel.com
Cc: dev@dpdk.org, ferruh.yigit@intel.com, helin.zhang@intel.com,
Qi Zhang <qi.z.zhang@intel.com>
Subject: [dpdk-dev] [PATCH 04/20] net/i40e/base: enable cloud filter mode for switch config
Date: Tue, 25 Sep 2018 10:34:26 +0800 [thread overview]
Message-ID: <20180925023442.134705-5-qi.z.zhang@intel.com> (raw)
In-Reply-To: <20180925023442.134705-1-qi.z.zhang@intel.com>
Add definitions for L4 filters and switch modes based on cloud filters
modes and extend the set switch config command to include the additional
cloud filter mode.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/i40e/base/i40e_adminq_cmd.h | 30 +++++++++++++++++++++++++++++-
drivers/net/i40e/base/i40e_common.c | 4 +++-
drivers/net/i40e/base/i40e_prototype.h | 2 +-
drivers/net/i40e/base/i40e_type.h | 9 +++++++++
drivers/net/i40e/i40e_ethdev.c | 2 +-
5 files changed, 43 insertions(+), 4 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index af9c90b78..2d714ec5e 100644
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -775,7 +775,35 @@ struct i40e_aqc_set_switch_config {
*/
__le16 first_tag;
__le16 second_tag;
- u8 reserved[6];
+ /* Next byte is split into following:
+ * Bit 7 : 0 : No action, 1: Switch to mode defined by bits 6:0
+ * Bit 6 : 0 : Destination Port, 1: source port
+ * Bit 5..4 : L4 type
+ * 0: rsvd
+ * 1: TCP
+ * 2: UDP
+ * 3: Both TCP and UDP
+ * Bits 3:0 Mode
+ * 0: default mode
+ * 1: L4 port only mode
+ * 2: non-tunneled mode
+ * 3: tunneled mode
+ */
+#define I40E_AQ_SET_SWITCH_BIT7_VALID 0x80
+
+#define I40E_AQ_SET_SWITCH_L4_SRC_PORT 0x40
+
+#define I40E_AQ_SET_SWITCH_L4_TYPE_RSVD 0x00
+#define I40E_AQ_SET_SWITCH_L4_TYPE_TCP 0x10
+#define I40E_AQ_SET_SWITCH_L4_TYPE_UDP 0x20
+#define I40E_AQ_SET_SWITCH_L4_TYPE_BOTH 0x30
+
+#define I40E_AQ_SET_SWITCH_MODE_DEFAULT 0x00
+#define I40E_AQ_SET_SWITCH_MODE_L4_PORT 0x01
+#define I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL 0x02
+#define I40E_AQ_SET_SWITCH_MODE_TUNNEL 0x03
+ u8 mode;
+ u8 rsvd5[5];
};
I40E_CHECK_CMD_LENGTH(i40e_aqc_set_switch_config);
diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c
index ee117bd5e..856e7bef6 100644
--- a/drivers/net/i40e/base/i40e_common.c
+++ b/drivers/net/i40e/base/i40e_common.c
@@ -2681,13 +2681,14 @@ enum i40e_status_code i40e_aq_get_switch_config(struct i40e_hw *hw,
* i40e_aq_set_switch_config
* @hw: pointer to the hardware structure
* @flags: bit flag values to set
+ * @mode: cloud filter mode
* @valid_flags: which bit flags to set
* @cmd_details: pointer to command details structure or NULL
*
* Set switch configuration bits
**/
enum i40e_status_code i40e_aq_set_switch_config(struct i40e_hw *hw,
- u16 flags, u16 valid_flags,
+ u16 flags, u16 valid_flags, u8 mode,
struct i40e_asq_cmd_details *cmd_details)
{
struct i40e_aq_desc desc;
@@ -2699,6 +2700,7 @@ enum i40e_status_code i40e_aq_set_switch_config(struct i40e_hw *hw,
i40e_aqc_opc_set_switch_config);
scfg->flags = CPU_TO_LE16(flags);
scfg->valid_flags = CPU_TO_LE16(valid_flags);
+ scfg->mode = mode;
if (hw->flags & I40E_HW_FLAG_802_1AD_CAPABLE) {
scfg->switch_tag = CPU_TO_LE16(hw->switch_tag);
scfg->first_tag = CPU_TO_LE16(hw->first_tag);
diff --git a/drivers/net/i40e/base/i40e_prototype.h b/drivers/net/i40e/base/i40e_prototype.h
index 50dd80709..6331aadf2 100644
--- a/drivers/net/i40e/base/i40e_prototype.h
+++ b/drivers/net/i40e/base/i40e_prototype.h
@@ -199,7 +199,7 @@ enum i40e_status_code i40e_aq_get_switch_config(struct i40e_hw *hw,
u16 buf_size, u16 *start_seid,
struct i40e_asq_cmd_details *cmd_details);
enum i40e_status_code i40e_aq_set_switch_config(struct i40e_hw *hw,
- u16 flags, u16 valid_flags,
+ u16 flags, u16 valid_flags, u8 mode,
struct i40e_asq_cmd_details *cmd_details);
enum i40e_status_code i40e_aq_request_resource(struct i40e_hw *hw,
enum i40e_aq_resources_ids resource,
diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index 7dde3bfd2..b50a82307 100644
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -349,6 +349,15 @@ struct i40e_hw_capabilities {
#define I40E_NVM_IMAGE_TYPE_CLOUD 0x2
#define I40E_NVM_IMAGE_TYPE_UDP_CLOUD 0x3
+ /* Cloud filter modes:
+ * Mode1: Filter on L4 port only
+ * Mode2: Filter for non-tunneled traffic
+ * Mode3: Filter for tunnel traffic
+ */
+#define I40E_CLOUD_FILTER_MODE1 0x6
+#define I40E_CLOUD_FILTER_MODE2 0x7
+#define I40E_CLOUD_FILTER_MODE3 0x8
+
u32 management_mode;
u32 mng_protocols_over_mctp;
#define I40E_MNG_PROTOCOL_PLDM 0x2
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index de25de650..706c82dc4 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -3653,7 +3653,7 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev,
if (vlan_type == ETH_VLAN_TYPE_OUTER)
hw->second_tag = rte_cpu_to_le_16(tpid);
}
- ret = i40e_aq_set_switch_config(hw, 0, 0, NULL);
+ ret = i40e_aq_set_switch_config(hw, 0, 0, 0, NULL);
if (ret != I40E_SUCCESS) {
PMD_DRV_LOG(ERR,
"Set switch config failed aq_err: %d",
--
2.13.6
next prev parent reply other threads:[~2018-09-25 2:34 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-25 2:34 [dpdk-dev] [PATCH 00/20] base code update Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 01/20] net/i40e/base: replace license text with SPDX tag Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 02/20] net/i40e/base: fix partition id calculation for X722 Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 03/20] net/i40e/base: introduce PHY type bitmask Qi Zhang
2018-09-25 2:34 ` Qi Zhang [this message]
2018-09-25 2:34 ` [dpdk-dev] [PATCH 05/20] net/i40e/base: add admin queue definitions for cloud filters Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 06/20] net/i40e/base: enable cloud filters via tc flower Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 07/20] net/i40e/base: improve the polling mechanism Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 08/20] net/i40e/base: read LLDP config area with correct endianness Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 09/20] net/i40e/base: properly clean resources Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 10/20] net/i40e/base: gracefully clean the resources Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 11/20] net/i40e/base: correct global reset timeout calculation Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 12/20] net/i40e/base: change AQ command for PHY access Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 13/20] net/i40e/base: add additional return code Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 14/20] net/i40e/base: add AQ command for rearrange NVM structure Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 15/20] net/i40e/base: add FC threshold parameter for set MAC Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 16/20] net/i40e/base: add support for carlsville device Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 17/20] net/i40e/base: wrap admin queue set/get PHY register funcs Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 18/20] net/i40e/base: add capability flag for stopping FW LLDP Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 19/20] net/i40e/base: add new TR bits used for cloud filters Qi Zhang
2018-09-25 2:34 ` [dpdk-dev] [PATCH 20/20] net/i40e/base: update readme Qi Zhang
2018-09-27 7:39 ` [dpdk-dev] [PATCH 00/20] base code update Xing, Beilei
2018-09-29 2:13 ` Zhang, Qi Z
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