From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm1-f65.google.com (mail-wm1-f65.google.com [209.85.128.65]) by dpdk.org (Postfix) with ESMTP id 959B61B39E for ; Wed, 26 Sep 2018 13:58:34 +0200 (CEST) Received: by mail-wm1-f65.google.com with SMTP id b19-v6so1982285wme.3 for ; Wed, 26 Sep 2018 04:58:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to :user-agent; bh=deg3qwg04NqjuU6u6FU6bgLi9xkojux4G3jxabhe2yg=; b=jjf9O0lKZloJbIe1rTrALv25A102wUD+WrSl4CdUzYXd5+kVhpsC7kNkD7/OnIDEQ/ onKbYc7qBCnDNLtF3vQWeyIX/Y4r47tzqlTKcWTNad1zmf1ZgndxT8LBE8CNoWtmex+X wwLPEjztujRd+WRxaQ0YwLjMaMwUas+5w3fal7xXI9mUdQL3E2bvTTcckk27xT9VNcCQ C/gFK1bJwwIR2IaJsRRGAqS83artPtaUGDoYsYV+HOEvneS7yAROBAYSpBdnfyWcAgYs 1Jp6BrpPRtI1YiuA33cbngwkbpCH+v8w9rj+/982kU10rnvQFW3g1qYZFmCvnWLwh3+O XE5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to:user-agent; bh=deg3qwg04NqjuU6u6FU6bgLi9xkojux4G3jxabhe2yg=; b=I9iJ3AHyPpUg6PAKMFtV4Qon+yK12296E/r2PG1JGRR6V+NoQzrNX2hMp8k8zo95m9 nhdxEElKHDRSV+MdltoAqxkr5hp/DBlwwAQbVMeuTuGySeyoqjIHN/2r74qmLgKdlZDU 1nD+sSJ+rmBUHFHElSgL9RRnTup90kwig+KEn/6pxCs+QEGbsINGuynbbVb4IIMymLTc 3DlnG81yJxES7IM610xIy7XZfAKdX3vkx7chxoI7zWn3XtDiwQds3qZ50lmssQrpGVr6 bboDmdI3NlthWCiBYuiYJh5iHwUAtZQaTj4/Zl8piy76KvUtUzymJMOZjmhQgU0t0DtO mCkQ== X-Gm-Message-State: ABuFfojSkTakfrxiHMNyUBFjUwygXQB6qhEDVdam+/cJm39DdoMIsbN7 68sG4M/pUwV7Xz/fu36u/ZPQOA== X-Google-Smtp-Source: ACcGV63Wg12tfvPgBhRlSWw05sqXVC8hnuFGvHqYaOlidbz6Yw/tjI/SqYI7/JxgIyqKWm6LwzA5lQ== X-Received: by 2002:a1c:9f41:: with SMTP id i62-v6mr672611wme.53.1537963113792; Wed, 26 Sep 2018 04:58:33 -0700 (PDT) Received: from bidouze.vm.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id y11-v6sm4320119wrp.30.2018.09.26.04.58.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 26 Sep 2018 04:58:32 -0700 (PDT) Date: Wed, 26 Sep 2018 13:58:15 +0200 From: =?iso-8859-1?Q?Ga=EBtan?= Rivet To: Andrew Rybchenko Cc: dev@dpdk.org, Ferruh Yigit , Igor Romanov , stable@dpdk.org Message-ID: <20180926115815.rlwzryfognltlzq5@bidouze.vm.6wind.com> References: <1535528736-31325-1-git-send-email-arybchenko@solarflare.com> <1537943884-12979-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1537943884-12979-1-git-send-email-arybchenko@solarflare.com> User-Agent: NeoMutt/20170113 (1.7.2) Subject: Re: [dpdk-dev] [PATCH v2] net/failsafe: report actual device capabilities X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 26 Sep 2018 11:58:34 -0000 On Wed, Sep 26, 2018 at 07:38:04AM +0100, Andrew Rybchenko wrote: > From: Igor Romanov > > Failsafe device capabilities depend on supported by the failsafe > itself plus capabilities supported by sub-devices. > Make fs_dev_infos_get() take failsafe device capabilities into account. > > Fixes: cac923cfea47 ("ethdev: support runtime queue setup") > Cc: stable@dpdk.org > > Signed-off-by: Igor Romanov > Signed-off-by: Andrew Rybchenko Acked-by: Gaetan Rivet > --- > drivers/net/failsafe/failsafe_ops.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/net/failsafe/failsafe_ops.c b/drivers/net/failsafe/failsafe_ops.c > index 86d7fa2a0..7f8bcd4c6 100644 > --- a/drivers/net/failsafe/failsafe_ops.c > +++ b/drivers/net/failsafe/failsafe_ops.c > @@ -890,6 +890,8 @@ fs_stats_reset(struct rte_eth_dev *dev) > * all sub_devices and the default capabilities. > * Uses a logical AND of TX capabilities among > * the active probed sub_device and the default capabilities. > + * Uses a logical AND of device capabilities among > + * all sub_devices and the default capabilities. > * > */ > static void > @@ -908,10 +910,12 @@ fs_dev_infos_get(struct rte_eth_dev *dev, > uint64_t rx_offload_capa; > uint64_t rxq_offload_capa; > uint64_t rss_hf_offload_capa; > + uint64_t dev_capa; > > rx_offload_capa = default_infos.rx_offload_capa; > rxq_offload_capa = default_infos.rx_queue_offload_capa; > rss_hf_offload_capa = default_infos.flow_type_rss_offloads; > + dev_capa = default_infos.dev_capa; > FOREACH_SUBDEV_STATE(sdev, i, dev, DEV_PROBED) { > rte_eth_dev_info_get(PORT_ID(sdev), > &PRIV(dev)->infos); > @@ -920,12 +924,14 @@ fs_dev_infos_get(struct rte_eth_dev *dev, > PRIV(dev)->infos.rx_queue_offload_capa; > rss_hf_offload_capa &= > PRIV(dev)->infos.flow_type_rss_offloads; > + dev_capa &= PRIV(dev)->infos.dev_capa; > } > sdev = TX_SUBDEV(dev); > rte_eth_dev_info_get(PORT_ID(sdev), &PRIV(dev)->infos); > PRIV(dev)->infos.rx_offload_capa = rx_offload_capa; > PRIV(dev)->infos.rx_queue_offload_capa = rxq_offload_capa; > PRIV(dev)->infos.flow_type_rss_offloads = rss_hf_offload_capa; > + PRIV(dev)->infos.dev_capa = dev_capa; > PRIV(dev)->infos.tx_offload_capa &= > default_infos.tx_offload_capa; > PRIV(dev)->infos.tx_queue_offload_capa &= > -- > 2.17.1 > -- Gaëtan Rivet 6WIND