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Tue, 23 Oct 2018 17:22:52 +0000 From: Yongseok Koh To: Ori Kam , "Xueming(Steven) Li" CC: Shahaf Shuler , "dev@dpdk.org" Thread-Topic: [PATCH 4/5] net/mlx5: fix wildcard item for Direct Verbs Thread-Index: AQHUZb44Sv6Ho+4ohEShzRKzUMWDDqUsfGYAgACBT4CAACDTAA== Date: Tue, 23 Oct 2018 17:22:52 +0000 Message-ID: <20181023172244.GA17697@mtidpdk.mti.labs.mlnx> References: <20181017020739.11203-1-yskoh@mellanox.com> <20181017020739.11203-4-yskoh@mellanox.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BYAPR08CA0028.namprd08.prod.outlook.com (2603:10b6:a03:100::41) To DB3PR0502MB3980.eurprd05.prod.outlook.com (2603:10a6:8:10::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [209.116.155.178] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; DB3PR0502MB4057; 6:Z1XsHChSa0Umd2nGyGYGMexsaXTteHbM+7gpJbJB0kh1r/gxJIBJyUMVMRfK3oq2OVw4C2Du/bf7GmR9xgtY04Wr6W6B44KU/NGP/jtYbgTIcmk30BnTvsBkQT9x7OC3GtxSIStJ3SgRq1Sm6nQAQEOuwMKFKfCJdgbtsf53bTe8vl4WaO4egpD/zBaNhYB8E7IA3QMtR1pH/iUqFb+AUl9UalXBEVw/AIYpApb9QLYx83kZoz45KdmXMUB022Jj3i1VrImfNH3typ775QsiEPwA+M1i7st5EPYxc19nvL6/GCmx8thRz9tPRvDs4X7tPSfVnvw1ApHcshTqmkTDx+/xO9hrzTE27tqhxV/JopngEtiWYn6OyNPUzMWwiunIhKDNZ6UlqOvcXKdPZFM+fUkaijHl765m0A8/u4Tmz/nlA2VtiicdNiq+KCWG/pWPVWc5mCyeCUFEWg3C8EWrLQ==; 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charset="us-ascii" Content-ID: <7B0473895E832043A8C330FF2025D173@eurprd05.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9098b531-6d11-4d70-a9e7-08d6390c2961 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Oct 2018 17:22:52.2515 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0502MB4057 Subject: Re: [dpdk-dev] [PATCH 4/5] net/mlx5: fix wildcard item for Direct Verbs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Oct 2018 17:22:54 -0000 On Tue, Oct 23, 2018 at 08:25:15AM -0700, Ori Kam wrote: > PSB >=20 > > -----Original Message----- > > From: Shahaf Shuler > > Sent: Tuesday, October 23, 2018 10:42 AM > > To: Yongseok Koh > > Cc: dev@dpdk.org; Ori Kam > > Subject: RE: [PATCH 4/5] net/mlx5: fix wildcard item for Direct Verbs > >=20 > > Wednesday, October 17, 2018 5:08 AM, Yongseok Koh: > > > Subject: [PATCH 4/5] net/mlx5: fix wildcard item for Direct Verbs > > > > > > If a network layer is specified with no spec, it means wildcard match= . > > > flow_dv_translate_item_*() returns without writing anything if spec i= s null > > > and it causes creation of wrong flow. E.g., the following flow has to= patch > > > with any ipv4 packet. > > > > > > flow create 0 ingress pattern eth / ipv4 / end actions ... > > > > > > But, with the current code, it matches any packet because PMD doesn't= write > > > anything about IPv4. The matcher value and mask becomes completely ze= ro. > > > It should have written the IP version at least. It is same for the re= st of items. > > > > > > Even if the spec is null, PMD has to write constant fields before ret= urn, e.g. IP > > > version and IP protocol number. > > > > > > Fixes: fc2c498ccb94 ("net/mlx5: add Direct Verbs translate items") > > > Cc: orika@mellanox.com > > > > > > Signed-off-by: Yongseok Koh > > > Acked-by: Ori Kam > >=20 > > [...] > >=20 > > > #include > > > #include > > > #include > > > @@ -474,10 +473,6 @@ flow_dv_translate_item_ipv4(void *matcher, void > > > *key, > > > char *l24_v; > > > uint8_t tos; > > > > > > - if (!ipv4_v) > > > - return; > > > - if (!ipv4_m) > > > - ipv4_m =3D &nic_mask; > > > if (inner) { > > > headers_m =3D MLX5_ADDR_OF(fte_match_param, matcher, > > > inner_headers); > > > @@ -489,6 +484,10 @@ flow_dv_translate_item_ipv4(void *matcher, void > > > *key, > > > } > > > MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf); > > > MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4); > >=20 > > Is matching on the ip version is enough? Don't we need to match also th= e > > ethertype? > > Meaning maybe the value on the IP offset can be 4 even though it is not= a IPv4 > > header. > >=20 > > Same question for IPv6. >=20 > I think you are correct,=20 > We should also test the ethertype. Nope, we should test either one if kernel driver code is right. When I wrot= e this fix, I checked the driver code. static int parse_flow_attr(struct mlx5_core_dev *mdev, u32 *match_c, u32 *match_v, const union ib_flow_spec *ib_spec, const struct ib_flow_attr *flow_attr, struct mlx5_flow_act *action, u32 prev_type) { [...] if (ib_spec->type & IB_FLOW_SPEC_INNER) { headers_c =3D MLX5_ADDR_OF(fte_match_param, match_c, inner_headers); headers_v =3D MLX5_ADDR_OF(fte_match_param, match_v, inner_headers); match_ipv =3D MLX5_CAP_FLOWTABLE_NIC_RX(mdev, ft_field_support.inner_ip_version); } else { headers_c =3D MLX5_ADDR_OF(fte_match_param, match_c, outer_headers); headers_v =3D MLX5_ADDR_OF(fte_match_param, match_v, outer_headers); match_ipv =3D MLX5_CAP_FLOWTABLE_NIC_RX(mdev, ft_field_support.outer_ip_version); } [...] switch (ib_spec->type & ~IB_FLOW_SPEC_INNER) { [...] case IB_FLOW_SPEC_IPV4: if (match_ipv) { MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_version, 0xf); MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, MLX5_FS_IPV4_VERSION); } else { MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype, 0xffff); MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP); } It does look like it depends on device capability. So, I thought Xueming/Or= i already knew the result and made a decision to not check the capability. An= y comment? Thanks, Yongseok > >=20 > > > + if (!ipv4_v) > > > + return; > > > + if (!ipv4_m) > > > + ipv4_m =3D &nic_mask; > > > l24_m =3D MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, > > > dst_ipv4_dst_ipv6.ipv4_layout.ipv4); > > > l24_v =3D MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, @@ - > > > 557,10 +556,6 @@ flow_dv_translate_item_ipv6(void *matcher, void *key= , > > > int i; > > > int size; > > > > > > - if (!ipv6_v) > > > - return; > > > - if (!ipv6_m) > > > - ipv6_m =3D &nic_mask; > > > if (inner) { > > > headers_m =3D MLX5_ADDR_OF(fte_match_param, matcher, > > > inner_headers); > > > @@ -570,6 +565,12 @@ flow_dv_translate_item_ipv6(void *matcher, void > > > *key, > > > outer_headers); > > > headers_v =3D MLX5_ADDR_OF(fte_match_param, key, > > > outer_headers); > > > } > > > + MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf); > > > + MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6); > > > + if (!ipv6_v) > > > + return; > > > + if (!ipv6_m) > > > + ipv6_m =3D &nic_mask; > > > size =3D sizeof(ipv6_m->hdr.dst_addr); > > > l24_m =3D MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, > > > dst_ipv4_dst_ipv6.ipv6_layout.ipv6); > > > @@ -585,8 +586,6 @@ flow_dv_translate_item_ipv6(void *matcher, void > > > *key, > > > memcpy(l24_m, ipv6_m->hdr.src_addr, size); > > > for (i =3D 0; i < size; ++i) > > > l24_v[i] =3D l24_m[i] & ipv6_v->hdr.src_addr[i]; > > > - MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf); > > > - MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6); > > > /* TOS. */ > > > vtc_m =3D rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow); > > > vtc_v =3D rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v- > > > >hdr.vtc_flow); @@ -635,10 +634,6 @@ flow_dv_translate_item_tcp(void > > > *matcher, void *key, > > > void *headers_m; > > > void *headers_v; > > > > > > - if (!tcp_v) > > > - return; > > > - if (!tcp_m) > > > - tcp_m =3D &rte_flow_item_tcp_mask; > > > if (inner) { > > > headers_m =3D MLX5_ADDR_OF(fte_match_param, matcher, > > > inner_headers); > > > @@ -650,6 +645,10 @@ flow_dv_translate_item_tcp(void *matcher, void > > > *key, > > > } > > > MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); > > > MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, > > > IPPROTO_TCP); > > > + if (!tcp_v) > > > + return; > > > + if (!tcp_m) > > > + tcp_m =3D &rte_flow_item_tcp_mask; > > > MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport, > > > rte_be_to_cpu_16(tcp_m->hdr.src_port)); > > > MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport, @@ - > > > 682,10 +681,6 @@ flow_dv_translate_item_udp(void *matcher, void *key, > > > void *headers_m; > > > void *headers_v; > > > > > > - if (!udp_v) > > > - return; > > > - if (!udp_m) > > > - udp_m =3D &rte_flow_item_udp_mask; > > > if (inner) { > > > headers_m =3D MLX5_ADDR_OF(fte_match_param, matcher, > > > inner_headers); > > > @@ -697,6 +692,10 @@ flow_dv_translate_item_udp(void *matcher, void > > > *key, > > > } > > > MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); > > > MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, > > > IPPROTO_UDP); > > > + if (!udp_v) > > > + return; > > > + if (!udp_m) > > > + udp_m =3D &rte_flow_item_udp_mask; > > > MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport, > > > rte_be_to_cpu_16(udp_m->hdr.src_port)); > > > MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport, @@ - > > > 731,10 +730,6 @@ flow_dv_translate_item_gre(void *matcher, void *key, > > > void *misc_m =3D MLX5_ADDR_OF(fte_match_param, matcher, > > > misc_parameters); > > > void *misc_v =3D MLX5_ADDR_OF(fte_match_param, key, > > > misc_parameters); > > > > > > - if (!gre_v) > > > - return; > > > - if (!gre_m) > > > - gre_m =3D &rte_flow_item_gre_mask; > > > if (inner) { > > > headers_m =3D MLX5_ADDR_OF(fte_match_param, matcher, > > > inner_headers); > > > @@ -746,6 +741,10 @@ flow_dv_translate_item_gre(void *matcher, void > > > *key, > > > } > > > MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); > > > MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, > > > IPPROTO_GRE); > > > + if (!gre_v) > > > + return; > > > + if (!gre_m) > > > + gre_m =3D &rte_flow_item_gre_mask; > > > MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, > > > rte_be_to_cpu_16(gre_m->protocol)); > > > MLX5_SET(fte_match_set_misc, misc_v, gre_protocol, @@ -780,6 > > > +779,7 @@ flow_dv_translate_item_nvgre(void *matcher, void *key, > > > int size; > > > int i; > > > > > > + flow_dv_translate_item_gre(matcher, key, item, inner); > > > if (!nvgre_v) > > > return; > > > if (!nvgre_m) > > > @@ -790,7 +790,6 @@ flow_dv_translate_item_nvgre(void *matcher, void > > > *key, > > > memcpy(gre_key_m, tni_flow_id_m, size); > > > for (i =3D 0; i < size; ++i) > > > gre_key_v[i] =3D gre_key_m[i] & tni_flow_id_v[i]; > > > - flow_dv_translate_item_gre(matcher, key, item, inner); > > > } > > > > > > /** > > > @@ -822,10 +821,6 @@ flow_dv_translate_item_vxlan(void *matcher, void > > > *key, > > > int size; > > > int i; > > > > > > - if (!vxlan_v) > > > - return; > > > - if (!vxlan_m) > > > - vxlan_m =3D &rte_flow_item_vxlan_mask; > > > if (inner) { > > > headers_m =3D MLX5_ADDR_OF(fte_match_param, matcher, > > > inner_headers); > > > @@ -841,6 +836,10 @@ flow_dv_translate_item_vxlan(void *matcher, void > > > *key, > > > MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, > > > 0xFFFF); > > > MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, > > > dport); > > > } > > > + if (!vxlan_v) > > > + return; > > > + if (!vxlan_m) > > > + vxlan_m =3D &rte_flow_item_vxlan_mask; > > > size =3D sizeof(vxlan_m->vni); > > > vni_m =3D MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni); > > > vni_v =3D MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni); > > > -- > > > 2.11.0 >=20