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Tue, 30 Oct 2018 07:49:14 +0000 From: Yongseok Koh To: Shahaf Shuler CC: "dev@dpdk.org" , Yongseok Koh Thread-Topic: [PATCH v2 2/2] net/mlx5: make vectorized Tx threshold configurable Thread-Index: AQHUcCUNpQgWBzPUS0+FhwSaOemP+Q== Date: Tue, 30 Oct 2018 07:49:14 +0000 Message-ID: <20181030074901.40342-3-yskoh@mellanox.com> References: <20181029231509.39886-1-yskoh@mellanox.com> <20181030074901.40342-1-yskoh@mellanox.com> In-Reply-To: <20181030074901.40342-1-yskoh@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BYAPR05CA0033.namprd05.prod.outlook.com (2603:10b6:a03:c0::46) To DB3PR0502MB3980.eurprd05.prod.outlook.com (2603:10a6:8:10::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [209.116.155.178] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; DB3PR0502MB3962; 6:XUrclbKx73H6vRHTRQPK4LaRVaBt+CgjgzqWjwdmqX+alonwX/jXz5iz9D3xLIv7tb92JHg4jjYh3iD1eaKqZt5cnbnwctwp3tZTLKkgZnBfiyKF62g/sr6Eywq78vDJk8JqND6Vj0cumgFbCH+q+uKuM0beVEWTOAjxShRA5e7fU5pFGe907mZA1qJvfAk4PVO9pvOhHcwMqJIoF+FzxnkN0WGGqzU84Mik0CfdRVwPwY5LlW8P8EggozIrJTWQC5ao3+YUInqsQM+8ITui7EGRIGh9DBLRSLSNK+0Yhz70BrVgljrEQSw9Wb9f3ILe5/fTdxgRTzyhWcvGotDtzlKHHYhhEz2iv6U5AMt7adCgJTi7E8tBH82TyeCXOWId55eboe8+W2QYlnQpGGpzcMlHrlQ9RlwMGB7Asxxb0Gd7JVvlST+XfH2G9xCMeRZvUBFBDRR3qcWYlF0hHGNZYg==; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 13ffec32-8aa3-4b32-3b7f-08d63e3c2fc8 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Oct 2018 07:49:14.3867 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0502MB3962 Subject: [dpdk-dev] [PATCH v2 2/2] net/mlx5: make vectorized Tx threshold configurable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Oct 2018 07:49:16 -0000 Add txqs_max_vec parameter to configure the maximum number of Tx queues to enable vectorized Tx. And its default value is set according to the architecture and device type. Signed-off-by: Yongseok Koh --- doc/guides/nics/mlx5.rst | 16 +++++++++++++++- drivers/net/mlx5/mlx5.c | 16 ++++++++++++++++ drivers/net/mlx5/mlx5.h | 1 + drivers/net/mlx5/mlx5_defs.h | 6 ++++-- drivers/net/mlx5/mlx5_rxtx_vec.c | 2 +- 5 files changed, 37 insertions(+), 4 deletions(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 1dc32829ff..7379cf39b0 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -338,6 +338,20 @@ Run-time configuration =20 - Set to 8 by default. =20 +- ``txqs_max_vec`` parameter [int] + + Enable vectorized Tx only when the number of TX queues is less than or + equal to this value. Effective only when ``tx_vec_en`` is enabled. + + On ConnectX-5: + + - Set to 8 by default on ARMv8. + - Set to 4 by default otherwise. + + On Bluefield + + - Set to 16 by default. + - ``txq_mpw_en`` parameter [int] =20 A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and @@ -383,7 +397,7 @@ Run-time configuration - ``tx_vec_en`` parameter [int] =20 A nonzero value enables Tx vector on ConnectX-5 and Bluefield NICs if th= e number of - global Tx queues on the port is lesser than MLX5_VPMD_MIN_TXQS. + global Tx queues on the port is less than ``txqs_max_vec``. =20 This option cannot be used with certain offloads such as ``DEV_TX_OFFLOA= D_TCP_TSO, DEV_TX_OFFLOAD_VXLAN_TNL_TSO, DEV_TX_OFFLOAD_GRE_TNL_TSO, DEV_TX_OFFLOAD= _VLAN_INSERT``. diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 6fa50ba1b1..d575469f9b 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -75,6 +75,12 @@ */ #define MLX5_TXQS_MIN_INLINE "txqs_min_inline" =20 +/* + * Device parameter to configure the number of TX queues threshold for + * enabling vectorized Tx. + */ +#define MLX5_TXQS_MAX_VEC "txqs_max_vec" + /* Device parameter to enable multi-packet send WQEs. */ #define MLX5_TXQ_MPW_EN "txq_mpw_en" =20 @@ -496,6 +502,8 @@ mlx5_args_check(const char *key, const char *val, void = *opaque) config->txq_inline =3D tmp; } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) =3D=3D 0) { config->txqs_inline =3D tmp; + } else if (strcmp(MLX5_TXQS_MAX_VEC, key) =3D=3D 0) { + config->txqs_vec =3D tmp; } else if (strcmp(MLX5_TXQ_MPW_EN, key) =3D=3D 0) { config->mps =3D !!tmp; } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) =3D=3D 0) { @@ -543,6 +551,7 @@ mlx5_args(struct mlx5_dev_config *config, struct rte_de= vargs *devargs) MLX5_RXQS_MIN_MPRQ, MLX5_TXQ_INLINE, MLX5_TXQS_MIN_INLINE, + MLX5_TXQS_MAX_VEC, MLX5_TXQ_MPW_EN, MLX5_TXQ_MPW_HDR_DSEG_EN, MLX5_TXQ_MAX_INLINE_LEN, @@ -1443,6 +1452,8 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_u= nused, }; /* Device speicific configuration. */ switch (pci_dev->id.device_id) { + case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF: + dev_config.txqs_vec =3D MLX5_VPMD_MAX_TXQS_BLUEFIELD; case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF: case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF: case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF: @@ -1450,6 +1461,11 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_= unused, dev_config.vf =3D 1; break; default: +#if defined(RTE_ARCH_ARM64) + dev_config.txqs_vec =3D MLX5_VPMD_MAX_TXQS_ARM64; +#else + dev_config.txqs_vec =3D MLX5_VPMD_MAX_TXQS; +#endif break; } for (i =3D 0; i !=3D n; ++i) { diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 24a3415c8d..0b4418b80b 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -140,6 +140,7 @@ struct mlx5_dev_config { unsigned int ind_table_max_size; /* Maximum indirection table size. */ int txq_inline; /* Maximum packet size for inlining. */ int txqs_inline; /* Queue number threshold for inlining. */ + int txqs_vec; /* Queue number threshold for vectorized Tx. */ int inline_max_packet_sz; /* Max packet size for inlining. */ }; =20 diff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h index f2a1679511..221ca188bb 100644 --- a/drivers/net/mlx5/mlx5_defs.h +++ b/drivers/net/mlx5/mlx5_defs.h @@ -60,8 +60,10 @@ /* Maximum Packet headers size (L2+L3+L4) for TSO. */ #define MLX5_MAX_TSO_HEADER 192 =20 -/* Default minimum number of Tx queues for vectorized Tx. */ -#define MLX5_VPMD_MIN_TXQS 4 +/* Default maximum number of Tx queues for vectorized Tx. */ +#define MLX5_VPMD_MAX_TXQS 4 +#define MLX5_VPMD_MAX_TXQS_ARM64 8 +#define MLX5_VPMD_MAX_TXQS_BLUEFIELD 16 =20 /* Threshold of buffer replenishment for vectorized Rx. */ #define MLX5_VPMD_RXQ_RPLNSH_THRESH(n) \ diff --git a/drivers/net/mlx5/mlx5_rxtx_vec.c b/drivers/net/mlx5/mlx5_rxtx_= vec.c index 1453f4ff63..340292addf 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec.c +++ b/drivers/net/mlx5/mlx5_rxtx_vec.c @@ -277,7 +277,7 @@ mlx5_check_vec_tx_support(struct rte_eth_dev *dev) uint64_t offloads =3D dev->data->dev_conf.txmode.offloads; =20 if (!priv->config.tx_vec_en || - priv->txqs_n > MLX5_VPMD_MIN_TXQS || + priv->txqs_n > (unsigned int)priv->config.txqs_vec || priv->config.mps !=3D MLX5_MPW_ENHANCED || offloads & ~MLX5_VEC_TX_OFFLOAD_CAP) return -ENOTSUP; --=20 2.11.0