From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id CD4DD2D13; Tue, 13 Nov 2018 18:48:53 +0100 (CET) X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Nov 2018 09:48:52 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,228,1539673200"; d="scan'208";a="273693901" Received: from bricha3-mobl.ger.corp.intel.com ([10.237.221.107]) by orsmga005.jf.intel.com with SMTP; 13 Nov 2018 09:48:50 -0800 Received: by (sSMTP sendmail emulation); Tue, 13 Nov 2018 17:48:49 +0000 Date: Tue, 13 Nov 2018 17:48:48 +0000 From: Bruce Richardson To: "Wang, Yipeng1" Cc: Honnappa Nagarahalli , Thomas Monjalon , "stable@dpdk.org" , "dev@dpdk.org" , nd Message-ID: <20181113174848.GA24144@bricha3-MOBL.ger.corp.intel.com> References: <20181105173913.61225-1-bruce.richardson@intel.com> <20181112104719.62568-3-bruce.richardson@intel.com> <2853815.6en7p1Z5Aa@xps> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Research and Development Ireland Ltd. User-Agent: Mutt/1.10.1 (2018-07-13) Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH v2 2/4] hash: add local cache for TSX region X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Nov 2018 17:48:54 -0000 On Tue, Nov 13, 2018 at 05:24:55PM +0000, Wang, Yipeng1 wrote: > >-----Original Message----- > >From: Honnappa Nagarahalli [mailto:Honnappa.Nagarahalli@arm.com] > >Sent: Tuesday, November 13, 2018 9:17 AM > >To: Thomas Monjalon ; Richardson, Bruce ; Wang, Yipeng1 > > > >Cc: stable@dpdk.org; dev@dpdk.org; nd ; nd > >Subject: RE: [dpdk-stable] [dpdk-dev] [PATCH v2 2/4] hash: add local cache for TSX region > >> > > /* Check extra flags field to check extra options. */ > >> > > - if (params->extra_flag & > >> > > RTE_HASH_EXTRA_FLAGS_TRANS_MEM_SUPPORT) > >> > > + if (params->extra_flag & > >> > > RTE_HASH_EXTRA_FLAGS_TRANS_MEM_SUPPORT) { > >> > > + use_local_cache = 1; > >> > Do you see the issue even in the case of single writer? Enabling this flag > >> creates local caches on all the data plane cores. This increases the memory > >> usage for the single writer use case. Then there is 'writers on the control > >> plane' use case, the requirement on hash_add rate is comparatively lower > >> when compared to 'writers on the data plane'. The writers also are not pinned > >> to any core as well. In this use case, I am not sure how much having a local > >> cache matters. > >> > > >> > Enabling this flag effectively changes the free slot allocation from a ring to a > >> stack data structure. Does it indicate that for single writer use case with TSX, > >> the free slot (global) data structure should be a stack (rather than a ring)? > >> > >> Is it blocking this patchset from entering in 18.11? > >> If I understand well, there are some fixes for 18.11. > > [Wang, Yipeng] Hi Thomas, please go ahead merge the other commits without this one since Honnapa's concern. > I will talk with Honnappa separately on a better way to do this. > > Thanks! No objections to that plan here. /Bruce