From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 78992A00E6 for ; Wed, 20 Mar 2019 18:37:15 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A56821B3AC; Wed, 20 Mar 2019 18:37:14 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 806941B3A5 for ; Wed, 20 Mar 2019 18:37:13 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Mar 2019 10:37:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,249,1549958400"; d="scan'208";a="127122478" Received: from fyigit-mobl.ger.corp.intel.com (HELO [10.237.221.46]) ([10.237.221.46]) by orsmga008.jf.intel.com with ESMTP; 20 Mar 2019 10:37:11 -0700 To: "Lu, Wenzhuo" , "dev@dpdk.org" References: <1551340136-83843-1-git-send-email-wenzhuo.lu@intel.com> <1552630975-62900-1-git-send-email-wenzhuo.lu@intel.com> <1552630975-62900-7-git-send-email-wenzhuo.lu@intel.com> <0fe3736f-3093-9804-feff-a84df934f192@intel.com> <6A0DE07E22DDAD4C9103DF62FEBC0909407ED965@shsmsx102.ccr.corp.intel.com> From: Ferruh Yigit Openpgp: preference=signencrypt Autocrypt: addr=ferruh.yigit@intel.com; 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WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.5.3 MIME-Version: 1.0 In-Reply-To: <6A0DE07E22DDAD4C9103DF62FEBC0909407ED965@shsmsx102.ccr.corp.intel.com> Content-Type: text/plain; charset="UTF-8" Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v3 6/8] net/ice: support Rx AVX2 vector X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190320173710.f9NNlu8rV2k6LtqHMtJvGzYw1-XN_wnt9gIDQ9x1rL8@z> On 3/18/2019 1:37 AM, Lu, Wenzhuo wrote: > Hi Ferruh, > > >> -----Original Message----- >> From: Yigit, Ferruh >> Sent: Saturday, March 16, 2019 1:54 AM >> To: Lu, Wenzhuo ; dev@dpdk.org >> Subject: Re: [dpdk-dev] [PATCH v3 6/8] net/ice: support Rx AVX2 vector >> >> On 3/15/2019 6:22 AM, Wenzhuo Lu wrote: >>> Signed-off-by: Wenzhuo Lu >> <...> >> >>> +#ifdef RTE_LIBRTE_ICE_16BYTE_RX_DESC >>> + /* for AVX we need alignment otherwise loads are not >> atomic */ >>> + if (avx_aligned) { >>> + /* load in descriptors, 2 at a time, in reverse order */ >>> + raw_desc6_7 = _mm256_load_si256((void *)(rxdp + >> 6)); >>> + rte_compiler_barrier(); >>> + raw_desc4_5 = _mm256_load_si256((void *)(rxdp + >> 4)); >>> + rte_compiler_barrier(); >>> + raw_desc2_3 = _mm256_load_si256((void *)(rxdp + >> 2)); >>> + rte_compiler_barrier(); >>> + raw_desc0_1 = _mm256_load_si256((void *)(rxdp + >> 0)); >>> + } else >>> +#endif >>> + do { >>> + const __m128i raw_desc7 = >>> + _mm_load_si128((void *)(rxdp + 7)); >>> + rte_compiler_barrier(); >>> + const __m128i raw_desc6 = >>> + _mm_load_si128((void *)(rxdp + 6)); >>> + rte_compiler_barrier(); >>> + const __m128i raw_desc5 = >>> + _mm_load_si128((void *)(rxdp + 5)); >>> + rte_compiler_barrier(); >>> + const __m128i raw_desc4 = >>> + _mm_load_si128((void *)(rxdp + 4)); >>> + rte_compiler_barrier(); >>> + const __m128i raw_desc3 = >>> + _mm_load_si128((void *)(rxdp + 3)); >>> + rte_compiler_barrier(); >>> + const __m128i raw_desc2 = >>> + _mm_load_si128((void *)(rxdp + 2)); >>> + rte_compiler_barrier(); >>> + const __m128i raw_desc1 = >>> + _mm_load_si128((void *)(rxdp + 1)); >>> + rte_compiler_barrier(); >>> + const __m128i raw_desc0 = >>> + _mm_load_si128((void *)(rxdp + 0)); >>> + >>> + raw_desc6_7 = >>> + _mm256_inserti128_si256 >>> + >> (_mm256_castsi128_si256(raw_desc6), >>> + raw_desc7, 1); >>> + raw_desc4_5 = >>> + _mm256_inserti128_si256 >>> + >> (_mm256_castsi128_si256(raw_desc4), >>> + raw_desc5, 1); >>> + raw_desc2_3 = >>> + _mm256_inserti128_si256 >>> + >> (_mm256_castsi128_si256(raw_desc2), >>> + raw_desc3, 1); >>> + raw_desc0_1 = >>> + _mm256_inserti128_si256 >>> + >> (_mm256_castsi128_si256(raw_desc0), >>> + raw_desc1, 1); >>> + } while (0); >> >> Is this to provide the proper indention because of the above #ifdef block? If >> so why not simple { } for the scope, is do{ }while(0) has benefit against it? > Yes, it's for the indention. To my opinion, "do while" looks friendly to the readers as we always use it in the macros. Only "{}" looks missing a function name or a "for ()" :) > I found '{ }' more clear but no strong opinion, perhaps a comment to clarify to intention can be good but that also looks like optional, so up to you.