From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 84068A05D3 for ; Wed, 27 Mar 2019 12:29:06 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5264C1B146; Wed, 27 Mar 2019 12:28:57 +0100 (CET) Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by dpdk.org (Postfix) with ESMTP id B64DD1B6DC for ; Fri, 22 Mar 2019 23:57:50 +0100 (CET) Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x2MMrxGT043829 for ; Fri, 22 Mar 2019 18:57:50 -0400 Received: from smtp.notes.na.collabserv.com (smtp.notes.na.collabserv.com [192.155.248.72]) by mx0a-001b2d01.pphosted.com with ESMTP id 2rd7dsjn2s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 22 Mar 2019 18:57:49 -0400 Received: from localhost by smtp.notes.na.collabserv.com with smtp.notes.na.collabserv.com ESMTP for from ; Fri, 22 Mar 2019 22:57:49 -0000 Received: from us1a3-smtp05.a3.dal06.isc4sb.com (10.146.71.159) by smtp.notes.na.collabserv.com (10.106.227.158) with smtp.notes.na.collabserv.com ESMTP; Fri, 22 Mar 2019 22:57:38 -0000 Received: from us1a3-mail95.a3.dal06.isc4sb.com ([10.146.21.14]) by us1a3-smtp05.a3.dal06.isc4sb.com with ESMTP id 2019032222573850-1062147 ; Fri, 22 Mar 2019 22:57:38 +0000 MIME-Version: 1.0 In-Reply-To: <4334064.10fvSv6A2r@xps> To: Thomas Monjalon Cc: bruce.richardson@intel.com, Chao Zhu , Dekel Peled , dev@dpdk.org, David Christensen , honnappa.nagarahalli@arm.com, konstantin.ananyev@intel.com, ola.liljedahl@arm.com, Ori Kam , Shahaf Shuler , David Wilder , Yongseok Koh From: "Pradeep Satyanarayana" Date: Fri, 22 Mar 2019 14:57:37 -0800 References: <1552913893-43407-1-git-send-email-dekelp@mellanox.com> <11283309.AIL3tCH6tf@xps> <4334064.10fvSv6A2r@xps> X-KeepSent: 4C2DBD4B:3CAEF22E-882583C5:007DFA88; type=4; name=$KeepSent X-Mailer: IBM Notes Release 9.0.1EXT SHF993 September 20, 2018 X-LLNOutbound: False X-Disclaimed: 5991 X-TNEFEvaluated: 1 x-cbid: 19032222-6059-0000-0000-00000DE55F8F X-IBM-SpamModules-Scores: BY=0.281828; FL=0; FP=0; FZ=0; HX=0; KW=0; PH=0; SC=0.433748; ST=0; TS=0; UL=0; ISC=; MB=0.000643 X-IBM-SpamModules-Versions: BY=3.00010797; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000282; SDB=6.01178225; UDB=6.00616418; IPR=6.00958924; BA=6.00006267; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00026118; XFM=3.00000015; UTC=2019-03-22 22:57:46 X-IBM-AV-DETECTION: SAVI=unsuspicious REMOTE=unsuspicious XFE=unused X-IBM-AV-VERSION: SAVI=2019-03-22 07:34:42 - 6.00009725 x-cbparentid: 19032222-6060-0000-0000-00007985AAD0 Message-Id: X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-22_13:, , signatures=0 X-Proofpoint-Spam-Reason: safe X-Mailman-Approved-At: Wed, 27 Mar 2019 12:28:50 +0100 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: Re: [dpdk-dev] [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190322225737.6xN5UpJFmdEyNcAKiS06r6s6EAf2yf6a7jdKDds7CuU@z> Thomas Monjalon wrote on 03/22/2019 10:51:17 AM: > From: Thomas Monjalon > To: Pradeep Satyanarayana > Cc: bruce.richardson@intel.com, Chao Zhu > , Dekel Peled , > dev@dpdk.org, David Christensen , > honnappa.nagarahalli@arm.com, konstantin.ananyev@intel.com, > ola.liljedahl@arm.com, Ori Kam , Shahaf Shuler > , David Wilder , Yongseok > Koh > Date: 03/22/2019 10:51 AM > Subject: Re: [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER > > 22/03/2019 16:30, Pradeep Satyanarayana: > > Thomas Monjalon wrote on 03/22/2019 01:49:03 AM: > > > 22/03/2019 02:40, Pradeep Satyanarayana: > > > > - rte=5F[rw]mb (general memory barrier) --> should be lwsync > > > > > > This is what may be discussed. > > > The assumption is that the general memory barrier should cover > > > all cases (CPU caches, SMP and I/O). > > > That's why we think it should "sync" for Power. > > > > In that case, at a minimum we must de-link rte=5Fsmp=5F[rw]mb from rte=5F[rw]mb > > and retain it as lwsync. Agreed? > > I have no clue about what is needed for SMP barrier in Power. > As long as it works as expected, no problem. > We will try that out and report back here, later next week Thanks Pradeep pradeep@us.ibm.com