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From: Dekel Peled <dekelp@mellanox.com>
To: "pradeep@us.ibm.com" <pradeep@us.ibm.com>, Shahaf Shuler
 <shahafs@mellanox.com>
CC: "bruce.richardson@intel.com" <bruce.richardson@intel.com>, Chao Zhu
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Thread-Topic: [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER
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Subject: Re: [dpdk-dev] [PATCH] eal/ppc: remove fix of memory barrier for
	IBM POWER
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+Idan Werpoler.

From: Pradeep Satyanarayana <pradeep@us.ibm.com>
Sent: Sunday, March 24, 2019 7:38 PM
To: Shahaf Shuler <shahafs@mellanox.com>
Cc: bruce.richardson@intel.com; Chao Zhu <chaozhu@linux.vnet.ibm.com>; Deke=
l Peled <dekelp@mellanox.com>; dev@dpdk.org; David Christensen <drc@ibm.com=
>; honnappa.nagarahalli@arm.com; konstantin.ananyev@intel.com; ola.liljedah=
l@arm.com; Ori Kam <orika@mellanox.com>; Thomas Monjalon <thomas@monjalon.n=
et>; David Wilder <wilder@us.ibm.com>; Yongseok Koh <yskoh@mellanox.com>
Subject: RE: [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER


Shahaf Shuler <shahafs@mellanox.com<mailto:shahafs@mellanox.com>> wrote on =
03/23/2019 11:37:42 PM:

> From: Shahaf Shuler <shahafs@mellanox.com<mailto:shahafs@mellanox.com>>
> To: "pradeep@us.ibm.com<mailto:pradeep@us.ibm.com>" <pradeep@us.ibm.com<m=
ailto:pradeep@us.ibm.com>>, Thomas Monjalon
> <thomas@monjalon.net<mailto:thomas@monjalon.net>>
> Cc: "bruce.richardson@intel.com<mailto:bruce.richardson@intel.com>" <bruc=
e.richardson@intel.com<mailto:bruce.richardson@intel.com>>, Chao
> Zhu <chaozhu@linux.vnet.ibm.com<mailto:chaozhu@linux.vnet.ibm.com>>, Deke=
l Peled <dekelp@mellanox.com<mailto:dekelp@mellanox.com>>,
> "dev@dpdk.org<mailto:dev@dpdk.org>" <dev@dpdk.org<mailto:dev@dpdk.org>>, =
David Christensen <drc@ibm.com<mailto:drc@ibm.com>>,
> "honnappa.nagarahalli@arm.com<mailto:honnappa.nagarahalli@arm.com>" <honn=
appa.nagarahalli@arm.com<mailto:honnappa.nagarahalli@arm.com>>,
> "konstantin.ananyev@intel.com<mailto:konstantin.ananyev@intel.com>" <kons=
tantin.ananyev@intel.com<mailto:konstantin.ananyev@intel.com>>,
> "ola.liljedahl@arm.com<mailto:ola.liljedahl@arm.com>" <ola.liljedahl@arm.=
com<mailto:ola.liljedahl@arm.com>>, Ori Kam
> <orika@mellanox.com<mailto:orika@mellanox.com>>, David Wilder <wilder@us.=
ibm.com<mailto:wilder@us.ibm.com>>, Yongseok Koh
> <yskoh@mellanox.com<mailto:yskoh@mellanox.com>>
> Date: 03/23/2019 11:37 PM
> Subject: RE: [PATCH] eal/ppc: remove fix of memory barrier for IBM POWER
>
> Pradeep,
>
> Pradeep Satyanarayana wrote on Saturday, March 23, 2019 12:58 AM
> >Thomas Monjalon <thomas@monjalon.net<mailto:thomas@monjalon.net>> wrote =
on 03/22/2019 10:51:17 AM:
> >> Date: 03/22/2019 10:51 AM
> >> Subject: Re: [PATCH] eal/ppc: remove fix of memory barrier for IBM POW=
ER
> >>
> >> 22/03/2019 16:30, Pradeep Satyanarayana:
> >> > Thomas Monjalon <thomas@monjalon.net<mailto:thomas@monjalon.net>> wr=
ote on 03/22/2019 01:49:03 AM:
> >> > > 22/03/2019 02:40, Pradeep Satyanarayana:
> >> > > > - rte_[rw]mb (general memory barrier) --> should be lwsync
> >> > >
> >> > > This is what may be discussed.
> >> > > The assumption is that the general memory barrier should cover
> >> > > all cases (CPU caches, SMP and I/O).
> >> > > That's why we think it should "sync" for Power.
> >> >
> >> > In that case, at a minimum we must de-link rte_smp_[rw]mb from rte_[=
rw]mb
> >> > and retain it as lwsync. Agreed?
> >>
> >> I have no clue about what is needed for SMP barrier in Power.
> >> As long as it works as expected, no problem.
> >>
> >
> >We will try that out and report back here, later next week
>
> Till then, i think there are 2 orthogonal issues:
> 1. ppc rte_wmb is incorrect
> 2. ppc rte_smp_[rw]mb may be improved.
>
> for #1 the current patch from Dekel seems to be OK. do you agree?
> for #2 i guess you will check and come back w/ patch/answer?

That has been the line of thinking. However, we need to do some extensive t=
esting
to confirm that it all holds up.

Thanks
Pradeep
pradeep@us.ibm.com<mailto:pradeep@us.ibm.com>