From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 82B8FA05D3 for ; Wed, 27 Mar 2019 14:18:23 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C799E1B3B4; Wed, 27 Mar 2019 14:16:50 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 5468B4CC5 for ; Wed, 27 Mar 2019 14:16:19 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from viacheslavo@mellanox.com) with ESMTPS (AES256-SHA encrypted); 27 Mar 2019 15:15:52 +0200 Received: from pegasus12.mtr.labs.mlnx. (pegasus12.mtr.labs.mlnx [10.210.17.40]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x2RDFpbs000934; Wed, 27 Mar 2019 15:15:52 +0200 From: Viacheslav Ovsiienko To: dev@dpdk.org Cc: shahafs@mellanox.com Date: Wed, 27 Mar 2019 13:15:47 +0000 Message-Id: <1553692547-16695-14-git-send-email-viacheslavo@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1553692547-16695-1-git-send-email-viacheslavo@mellanox.com> References: <1553614522-12151-1-git-send-email-viacheslavo@mellanox.com> <1553692547-16695-1-git-send-email-viacheslavo@mellanox.com> Subject: [dpdk-dev] [PATCH v4 13/13] net/mlx5: add source vport match to the ingress rules X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Content-Type: text/plain; charset="UTF-8" Message-ID: <20190327131547.ItRFIxRMg8RbY-Xbdq_RJ3YvBwxR0CqEcHEYUs3qLL8@z> For E-Switch configurations over multiport Infiniband devices we should add source vport match to correctly distribute traffic between representors. Signed-off-by: Viacheslav Ovsiienko Acked-by: Shahaf Shuler --- drivers/net/mlx5/mlx5_flow_dv.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index d4a1149..57847fb 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -2805,6 +2805,29 @@ struct field_modify_info modify_tcp[] = { } /** + * Add source vport match to the specified matcher. + * + * @param[in, out] matcher + * Flow matcher. + * @param[in, out] key + * Flow matcher value. + * @param[in] port + * Source vport value to match + * @param[in] mask + * Mask + */ +static void +flow_dv_translate_source_vport(void *matcher, void *key, + int16_t port, uint16_t mask) +{ + void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters); + void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters); + + MLX5_SET(fte_match_set_misc, misc_m, source_port, mask); + MLX5_SET(fte_match_set_misc, misc_v, source_port, port); +} + +/** * Fill the flow with DV spec. * * @param[in] dev @@ -3088,6 +3111,19 @@ struct field_modify_info modify_tcp[] = { } dev_flow->dv.actions_n = actions_n; flow->actions = action_flags; + if (attr->ingress && !attr->transfer && + (priv->representor || priv->master)) { + /* It was validated - we support unidirection flows only. */ + assert(!attr->egress); + /* + * Add matching on source vport index only + * for ingress rules in E-Switch configurations. + */ + flow_dv_translate_source_vport(matcher.mask.buf, + dev_flow->dv.value.buf, + priv->vport_id, + 0xffff); + } for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); void *match_mask = matcher.mask.buf; -- 1.8.3.1