From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id B6E7CA00B9 for ; Mon, 1 Apr 2019 02:06:41 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B4C6D1DB8; Mon, 1 Apr 2019 02:06:40 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id 57D9E11A4 for ; Mon, 1 Apr 2019 02:06:38 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 Mar 2019 17:06:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,294,1549958400"; d="scan'208";a="127466208" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga007.jf.intel.com with ESMTP; 31 Mar 2019 17:06:36 -0700 Received: from fmsmsx102.amr.corp.intel.com (10.18.124.200) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.408.0; Sun, 31 Mar 2019 17:06:35 -0700 Received: from fmsmsx108.amr.corp.intel.com ([169.254.9.216]) by FMSMSX102.amr.corp.intel.com ([169.254.10.60]) with mapi id 14.03.0415.000; Sun, 31 Mar 2019 17:06:35 -0700 From: "Eads, Gage" To: 'Honnappa Nagarahalli' , "'dev@dpdk.org'" CC: "'olivier.matz@6wind.com'" , "'arybchenko@solarflare.com'" , "Richardson, Bruce" , "Ananyev, Konstantin" , "'Gavin Hu (Arm Technology China)'" , 'nd' , "'thomas@monjalon.net'" , 'nd' , 'Thomas Monjalon' Thread-Topic: [PATCH v3 6/8] stack: add C11 atomic implementation Thread-Index: AQHU1CtbzfcoFG40VUqutGZl2oW8e6Yhl7KggAFxNMCAA4rc0A== Date: Mon, 1 Apr 2019 00:06:35 +0000 Message-ID: <9184057F7FC11744A2107296B6B8EB1E5420DDF2@FMSMSX108.amr.corp.intel.com> References: <20190305164256.2367-1-gage.eads@intel.com> <20190306144559.391-1-gage.eads@intel.com> <20190306144559.391-7-gage.eads@intel.com> <9184057F7FC11744A2107296B6B8EB1E5420D940@FMSMSX108.amr.corp.intel.com> In-Reply-To: <9184057F7FC11744A2107296B6B8EB1E5420D940@FMSMSX108.amr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYTFmZDAzMzUtODlhMS00YjNlLWFiYTctODQ5NzY5MWEzYzljIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiQ0ZNVzFQZzdUeUFDNkZJS0hNXC94SnVqakxyYUJQNzRreXFyaHRkSk1qcURBZSs4MGZYYUJyVFpRcW00dlBXRUIifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.1.200.106] Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 6/8] stack: add C11 atomic implementation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190401000635.AfPuCK92O9bXOty10yLDuqIspKRU45SgqEwruMXz06E@z> > -----Original Message----- > From: Eads, Gage > Sent: Friday, March 29, 2019 2:25 PM > To: Honnappa Nagarahalli ; > dev@dpdk.org > Cc: olivier.matz@6wind.com; arybchenko@solarflare.com; Richardson, Bruce > ; Ananyev, Konstantin > ; Gavin Hu (Arm Technology China) > ; nd ; thomas@monjalon.net; nd > ; Thomas Monjalon > Subject: RE: [PATCH v3 6/8] stack: add C11 atomic implementation >=20 > [snip] >=20 > > > +static __rte_always_inline void > > > +__rte_stack_lf_push(struct rte_stack_lf_list *list, > > > + struct rte_stack_lf_elem *first, > > > + struct rte_stack_lf_elem *last, > > > + unsigned int num) > > > +{ > > > +#ifndef RTE_ARCH_X86_64 > > > + RTE_SET_USED(first); > > > + RTE_SET_USED(last); > > > + RTE_SET_USED(list); > > > + RTE_SET_USED(num); > > > +#else > > > + struct rte_stack_lf_head old_head; > > > + int success; > > > + > > > + old_head =3D list->head; > > This can be a torn read (same as you have mentioned in > > __rte_stack_lf_pop). I suggest we use acquire thread fence here as > > well (please see the comments in __rte_stack_lf_pop). >=20 > Agreed. I'll add the acquire fence. >=20 On second thought, an acquire fence isn't necessary. The acquire fence in _= _rte_stack_lf_pop() ensures the list->head is ordered before the list eleme= nt reads. That isn't necessary here; we need to ensure that the last->next = write occurs (and is observed) before the list->head write, which the CAS's= RELEASE success memorder accomplishes. If a torn read occurs, the CAS will fail and will atomically re-load &old_h= ead.