From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 40CC6A0679 for ; Wed, 3 Apr 2019 21:21:23 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E61591B4BB; Wed, 3 Apr 2019 21:21:21 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 5939F1B49F for ; Wed, 3 Apr 2019 21:21:20 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Apr 2019 12:21:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,305,1549958400"; d="scan'208";a="312904775" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga005.jf.intel.com with ESMTP; 03 Apr 2019 12:21:19 -0700 Received: from fmsmsx108.amr.corp.intel.com ([169.254.9.216]) by fmsmsx104.amr.corp.intel.com ([169.254.3.38]) with mapi id 14.03.0415.000; Wed, 3 Apr 2019 12:21:18 -0700 From: "Eads, Gage" To: Thomas Monjalon CC: "dev@dpdk.org" , "olivier.matz@6wind.com" , "arybchenko@solarflare.com" , "Richardson, Bruce" , "Ananyev, Konstantin" , "gavin.hu@arm.com" , "Honnappa.Nagarahalli@arm.com" , "nd@arm.com" , "chaozhu@linux.vnet.ibm.com" , "jerinj@marvell.com" , "hemant.agrawal@nxp.com" Thread-Topic: [dpdk-dev] [PATCH v4 1/1] eal: add 128-bit compare exchange (x86-64 only) Thread-Index: AQHU6lAgrwNGPNF40kyjwHJLkHbfWKYqzNvw Date: Wed, 3 Apr 2019 19:21:18 +0000 Message-ID: <9184057F7FC11744A2107296B6B8EB1E542106DC@FMSMSX108.amr.corp.intel.com> References: <20190304205133.2248-1-gage.eads@intel.com> <20190403173438.23691-1-gage.eads@intel.com> <20190403173438.23691-2-gage.eads@intel.com> <2974113.GYloSpOT6o@xps> In-Reply-To: <2974113.GYloSpOT6o@xps> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYzUwZjFkNzktMjBjOC00NmFhLWFkZjQtMjQ4NTg5ZDhjZWU2IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoic0JXVEZhMWloYmVIckZnV1RMRGk5MHo1S0xtUHlvRks2dTM4WXBPUzVmNDEwaExRUjRyVDNQMWVcL2ZhU1NOZTAifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.1.200.107] Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v4 1/1] eal: add 128-bit compare exchange (x86-64 only) X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190403192118._w9rhBoWQR9p8DJPb3MRtCoqgwcD1lBPD1V_DB0rlas@z> > 03/04/2019 19:34, Gage Eads: > > This operation can be used for non-blocking algorithms, such as a > > non-blocking stack or ring. > > > > Signed-off-by: Gage Eads > > Reviewed-by: Honnappa Nagarahalli > > --- > > --- a/lib/librte_eal/common/include/arch/x86/rte_atomic_64.h > > +++ b/lib/librte_eal/common/include/arch/x86/rte_atomic_64.h > > +/** > > + * An atomic compare and set function used by the mutex functions. > > + * (Atomically) Equivalent to: > > + * if (*dst =3D=3D *exp) > > + * *dst =3D *src > > + * else > > + * *exp =3D *dst > > + * > > + * @note The success and failure arguments must be one of the > > +__ATOMIC_* values > > + * defined in the C++11 standard. For details on their behavior, > > +refer to the > > + * standard. > > + * > > + * @param dst > > + * The destination into which the value will be written. > > + * @param exp > > + * Pointer to the expected value. If the operation fails, this memor= y is > > + * updated with the actual value. > > + * @param src > > + * Pointer to the new value. > > + * @param weak > > + * A value of true allows the comparison to spuriously fail and allo= ws the > > + * 'exp' update to occur non-atomically (i.e. a torn read may occur)= . > > + * Implementations may ignore this argument and only implement the > strong > > + * variant. > > + * @param success > > + * If successful, the operation's memory behavior conforms to this (= or a > > + * stronger) model. > > + * @param failure > > + * If unsuccessful, the operation's memory behavior conforms to this= (or > a > > + * stronger) model. This argument cannot be __ATOMIC_RELEASE, > > + * __ATOMIC_ACQ_REL, or a stronger model than success. > > + * @return > > + * Non-zero on success; 0 on failure. > > + */ > > +static inline int __rte_experimental > > +rte_atomic128_cmp_exchange(rte_int128_t *dst, > > + rte_int128_t *exp, > > + const rte_int128_t *src, > > + unsigned int weak, > > + int success, > > + int failure) >=20 > I was thinking about keeping the doxygen in the generic file. > Is it possible? >=20 We'd need to include the definition of rte_int128_t, so we'd also need eith= er an ifdef on RTE_ARCH_64 or RTE_ARCH_X86_64 to protect 32-bit builds. Tha= t macro would prevent doxygen from parsing that section, unless we add a wo= rkaround like, for example: #if defined(RTE_ARCH_64) || defined(__DOXYGEN__) So the patch would look like the v3, with the declaration in generic/rte_at= omic.h, but with that preprocessor change. If we change RTE_ARCH_X86_64 to = RTE_ARCH_64, I'd add a note clarifying that it's only implemented for x86-6= 4. What do you think?