From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-f196.google.com (mail-pl1-f196.google.com [209.85.214.196]) by dpdk.org (Postfix) with ESMTP id 1D40C1B274 for ; Wed, 10 Apr 2019 18:15:28 +0200 (CEST) Received: by mail-pl1-f196.google.com with SMTP id g12so1698689pll.11 for ; Wed, 10 Apr 2019 09:15:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zuztoZIju+LTF7irQZXGVh2ZIOVZ7cufBo4vHNirzVs=; b=S/pLQeKyfJQeX5ZZlfj89OO9L9TtYJhYFHDuA5UaOXHTeQvdUnxqJxG8kzUZUoAQ6D ExqDNEcObRMhwNAuikXctEg5BsZCEDj5nmj/yGMEzs7sFnWm5GBL6ijkxZAoXdSdFahr 6HQ/Q6DMdc8LYJGSXS6h6p7SDCj5IhIw+cRYQkUfCGTzLdCZg/+jtL9N9+ZbnMqnjz1Q rz6P6J3plZBAmfub9U2GbBxaRUFHJRliHeO7e6GU2URnl4mFJ+PPivo9wq15Qqdd2q+s x7vmmC016jq1Z71Z/IoDu+KjixzY/9235dKd34fKt0shT4uYAgbKSXLw/ePHK8qoXmdS x0mA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zuztoZIju+LTF7irQZXGVh2ZIOVZ7cufBo4vHNirzVs=; b=AZcVoNDV2nv29R5FyITVZXOzJo9ZD0fDwZ51UwFL1mfvepCQ5lhVFFPS95SCSlvu/7 m2p9VjRGb5SUZeid8mJsZhANZq0TrlGGo6kN6Y1dhgoH6nhxU/nBGOG8qHvjODg4+dqd LNXKcdOaxrjRxGL5tPkS00RCfPC+E1Jy8TqA/qejm29vu7b/cI+bbcCROJv5cmvWwAG3 Zv0MubL3pGHsrgLa109tuJwg25MOxNgLbXKK+AzYaor06r5RG8FjfTC8kx1AI/Md1/qi gxZJyMEFfFBDhYL0MvSKx8a6Wr0cJtBpiw496WlorVuX7rsz/RCQQqe+ONxShcLPynrN 2qVA== X-Gm-Message-State: APjAAAXbwJP2r85UCW1+mnOVaA3SeF0O+fLME/3BOPtadtENvjp6mmx5 ts9MkRLbncSvLM3qdCXTlEk= X-Google-Smtp-Source: APXvYqxx/6ATSP6G1suF022wIn3yDrVumTQSFEJdDviS40MjBYykMdJViM5bP9e8kN4nBWW+X6yhMw== X-Received: by 2002:a17:902:a5ca:: with SMTP id t10mr43236137plq.234.1554912926979; Wed, 10 Apr 2019 09:15:26 -0700 (PDT) Received: from jerin.caveonetworks.com ([122.178.209.229]) by smtp.gmail.com with ESMTPSA id s79sm88447577pfa.31.2019.04.10.09.15.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 10 Apr 2019 09:15:25 -0700 (PDT) From: jerinjacobk@gmail.com X-Google-Original-From: jerinj@marvell.com To: Thomas Monjalon Cc: dev@dpdk.org, yskoh@mellanox.com, Jerin Jacob , Pavan Nikhilesh , Gavin Hu Date: Wed, 10 Apr 2019 21:44:00 +0530 Message-Id: <20190410161400.9361-4-jerinj@marvell.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190410161400.9361-1-jerinj@marvell.com> References: <20190406142737.20091-1-jerinj@marvell.com> <20190410161400.9361-1-jerinj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v8 4/4] config: add octeontx2 machine config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Apr 2019 16:15:28 -0000 From: Jerin Jacob Optimized configuration for Marvell octeontx2 SoC. Updated meson build to support Marvell octeontx2 SoC. Added meson cross build target for octeontx2. Signed-off-by: Jerin Jacob Signed-off-by: Pavan Nikhilesh Reviewed-by: Gavin Hu --- config/arm/arm64_octeontx2_linux_gcc | 16 +++++++++ config/arm/meson.build | 9 ++++- config/defconfig_arm64-octeontx2-linux-gcc | 1 + config/defconfig_arm64-octeontx2-linuxapp-gcc | 18 ++++++++++ mk/machine/octeontx2/rte.vars.mk | 34 +++++++++++++++++++ 5 files changed, 77 insertions(+), 1 deletion(-) create mode 100644 config/arm/arm64_octeontx2_linux_gcc create mode 120000 config/defconfig_arm64-octeontx2-linux-gcc create mode 100644 config/defconfig_arm64-octeontx2-linuxapp-gcc create mode 100644 mk/machine/octeontx2/rte.vars.mk diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc new file mode 100644 index 000000000..e2c0b8f72 --- /dev/null +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -0,0 +1,16 @@ +[binaries] +c = 'aarch64-linux-gnu-gcc' +cpp = 'aarch64-linux-gnu-cpp' +ar = 'aarch64-linux-gnu-gcc-ar' +strip = 'aarch64-linux-gnu-strip' +pcap-config = '' + +[host_machine] +system = 'linux' +cpu_family = 'aarch64' +cpu = 'armv8-a' +endian = 'little' + +[properties] +implementor_id = '0x43' +implementor_pn = '0xb2' diff --git a/config/arm/meson.build b/config/arm/meson.build index 3220b584f..0708bc64a 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -60,6 +60,12 @@ flags_thunderx2_extra = [ ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true]] +flags_octeontx2_extra = [ + ['RTE_MACHINE', '"octeontx2"'], + ['RTE_MAX_NUMA_NODES', 1], + ['RTE_MAX_LCORE', 24], + ['RTE_EAL_IGB_UIO', false], + ['RTE_USE_C11_MEM_MODEL', true]] machine_args_generic = [ ['default', ['-march=armv8-a+crc+crypto']], @@ -77,7 +83,8 @@ machine_args_cavium = [ ['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra], ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra], ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra], - ['0xaf', ['-mcpu=thunderx2t99'], flags_thunderx2_extra]] + ['0xaf', ['-mcpu=thunderx2t99'], flags_thunderx2_extra], + ['0xb2', ['-mcpu=octeontx2'], flags_octeontx2_extra]] ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) impl_generic = ['Generic armv8', flags_generic, machine_args_generic] diff --git a/config/defconfig_arm64-octeontx2-linux-gcc b/config/defconfig_arm64-octeontx2-linux-gcc new file mode 120000 index 000000000..e25150531 --- /dev/null +++ b/config/defconfig_arm64-octeontx2-linux-gcc @@ -0,0 +1 @@ +defconfig_arm64-octeontx2-linuxapp-gcc \ No newline at end of file diff --git a/config/defconfig_arm64-octeontx2-linuxapp-gcc b/config/defconfig_arm64-octeontx2-linuxapp-gcc new file mode 100644 index 000000000..9eae84538 --- /dev/null +++ b/config/defconfig_arm64-octeontx2-linuxapp-gcc @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Marvell International Ltd +# + +#include "defconfig_arm64-armv8a-linux-gcc" + +CONFIG_RTE_MACHINE="octeontx2" + +CONFIG_RTE_CACHE_LINE_SIZE=128 +CONFIG_RTE_MAX_NUMA_NODES=1 +CONFIG_RTE_MAX_LCORE=24 + +# Doesn't support NUMA +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n +CONFIG_RTE_LIBRTE_VHOST_NUMA=n + +# Recommend to use VFIO as co-processors needs SMMU/IOMMU +CONFIG_RTE_EAL_IGB_UIO=n diff --git a/mk/machine/octeontx2/rte.vars.mk b/mk/machine/octeontx2/rte.vars.mk new file mode 100644 index 000000000..cbec7f14d --- /dev/null +++ b/mk/machine/octeontx2/rte.vars.mk @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Marvell International Ltd +# + +# +# machine: +# +# - can define ARCH variable (overridden by cmdline value) +# - can define CROSS variable (overridden by cmdline value) +# - define MACHINE_CFLAGS variable (overridden by cmdline value) +# - define MACHINE_LDFLAGS variable (overridden by cmdline value) +# - define MACHINE_ASFLAGS variable (overridden by cmdline value) +# - can define CPU_CFLAGS variable (overridden by cmdline value) that +# overrides the one defined in arch. +# - can define CPU_LDFLAGS variable (overridden by cmdline value) that +# overrides the one defined in arch. +# - can define CPU_ASFLAGS variable (overridden by cmdline value) that +# overrides the one defined in arch. +# - may override any previously defined variable +# + +# ARCH = +# CROSS = +# MACHINE_CFLAGS = +# MACHINE_LDFLAGS = +# MACHINE_ASFLAGS = +# CPU_CFLAGS = +# CPU_LDFLAGS = +# CPU_ASFLAGS = + +include $(RTE_SDK)/mk/rte.helper.mk + +MACHINE_CFLAGS += $(call rte_cc_has_argument, -march=-mcpu=armv8.2-a+crc+crypto+lse) +MACHINE_CFLAGS += $(call rte_cc_has_argument, -mcpu=octeontx2) -- 2.21.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id D4D8FA0096 for ; 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Wed, 10 Apr 2019 09:15:25 -0700 (PDT) From: jerinjacobk@gmail.com X-Google-Original-From: jerinj@marvell.com To: Thomas Monjalon Cc: dev@dpdk.org, yskoh@mellanox.com, Jerin Jacob , Pavan Nikhilesh , Gavin Hu Date: Wed, 10 Apr 2019 21:44:00 +0530 Message-Id: <20190410161400.9361-4-jerinj@marvell.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190410161400.9361-1-jerinj@marvell.com> References: <20190406142737.20091-1-jerinj@marvell.com> <20190410161400.9361-1-jerinj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v8 4/4] config: add octeontx2 machine config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Content-Type: text/plain; charset="UTF-8" Message-ID: <20190410161400.QeWzJx8rpDcMx5G9SBmRaxbqMF0zizcj0__TAaVgQ4s@z> From: Jerin Jacob Optimized configuration for Marvell octeontx2 SoC. Updated meson build to support Marvell octeontx2 SoC. Added meson cross build target for octeontx2. Signed-off-by: Jerin Jacob Signed-off-by: Pavan Nikhilesh Reviewed-by: Gavin Hu --- config/arm/arm64_octeontx2_linux_gcc | 16 +++++++++ config/arm/meson.build | 9 ++++- config/defconfig_arm64-octeontx2-linux-gcc | 1 + config/defconfig_arm64-octeontx2-linuxapp-gcc | 18 ++++++++++ mk/machine/octeontx2/rte.vars.mk | 34 +++++++++++++++++++ 5 files changed, 77 insertions(+), 1 deletion(-) create mode 100644 config/arm/arm64_octeontx2_linux_gcc create mode 120000 config/defconfig_arm64-octeontx2-linux-gcc create mode 100644 config/defconfig_arm64-octeontx2-linuxapp-gcc create mode 100644 mk/machine/octeontx2/rte.vars.mk diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc new file mode 100644 index 000000000..e2c0b8f72 --- /dev/null +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -0,0 +1,16 @@ +[binaries] +c = 'aarch64-linux-gnu-gcc' +cpp = 'aarch64-linux-gnu-cpp' +ar = 'aarch64-linux-gnu-gcc-ar' +strip = 'aarch64-linux-gnu-strip' +pcap-config = '' + +[host_machine] +system = 'linux' +cpu_family = 'aarch64' +cpu = 'armv8-a' +endian = 'little' + +[properties] +implementor_id = '0x43' +implementor_pn = '0xb2' diff --git a/config/arm/meson.build b/config/arm/meson.build index 3220b584f..0708bc64a 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -60,6 +60,12 @@ flags_thunderx2_extra = [ ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true]] +flags_octeontx2_extra = [ + ['RTE_MACHINE', '"octeontx2"'], + ['RTE_MAX_NUMA_NODES', 1], + ['RTE_MAX_LCORE', 24], + ['RTE_EAL_IGB_UIO', false], + ['RTE_USE_C11_MEM_MODEL', true]] machine_args_generic = [ ['default', ['-march=armv8-a+crc+crypto']], @@ -77,7 +83,8 @@ machine_args_cavium = [ ['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra], ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra], ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra], - ['0xaf', ['-mcpu=thunderx2t99'], flags_thunderx2_extra]] + ['0xaf', ['-mcpu=thunderx2t99'], flags_thunderx2_extra], + ['0xb2', ['-mcpu=octeontx2'], flags_octeontx2_extra]] ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) impl_generic = ['Generic armv8', flags_generic, machine_args_generic] diff --git a/config/defconfig_arm64-octeontx2-linux-gcc b/config/defconfig_arm64-octeontx2-linux-gcc new file mode 120000 index 000000000..e25150531 --- /dev/null +++ b/config/defconfig_arm64-octeontx2-linux-gcc @@ -0,0 +1 @@ +defconfig_arm64-octeontx2-linuxapp-gcc \ No newline at end of file diff --git a/config/defconfig_arm64-octeontx2-linuxapp-gcc b/config/defconfig_arm64-octeontx2-linuxapp-gcc new file mode 100644 index 000000000..9eae84538 --- /dev/null +++ b/config/defconfig_arm64-octeontx2-linuxapp-gcc @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Marvell International Ltd +# + +#include "defconfig_arm64-armv8a-linux-gcc" + +CONFIG_RTE_MACHINE="octeontx2" + +CONFIG_RTE_CACHE_LINE_SIZE=128 +CONFIG_RTE_MAX_NUMA_NODES=1 +CONFIG_RTE_MAX_LCORE=24 + +# Doesn't support NUMA +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n +CONFIG_RTE_LIBRTE_VHOST_NUMA=n + +# Recommend to use VFIO as co-processors needs SMMU/IOMMU +CONFIG_RTE_EAL_IGB_UIO=n diff --git a/mk/machine/octeontx2/rte.vars.mk b/mk/machine/octeontx2/rte.vars.mk new file mode 100644 index 000000000..cbec7f14d --- /dev/null +++ b/mk/machine/octeontx2/rte.vars.mk @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Marvell International Ltd +# + +# +# machine: +# +# - can define ARCH variable (overridden by cmdline value) +# - can define CROSS variable (overridden by cmdline value) +# - define MACHINE_CFLAGS variable (overridden by cmdline value) +# - define MACHINE_LDFLAGS variable (overridden by cmdline value) +# - define MACHINE_ASFLAGS variable (overridden by cmdline value) +# - can define CPU_CFLAGS variable (overridden by cmdline value) that +# overrides the one defined in arch. +# - can define CPU_LDFLAGS variable (overridden by cmdline value) that +# overrides the one defined in arch. +# - can define CPU_ASFLAGS variable (overridden by cmdline value) that +# overrides the one defined in arch. +# - may override any previously defined variable +# + +# ARCH = +# CROSS = +# MACHINE_CFLAGS = +# MACHINE_LDFLAGS = +# MACHINE_ASFLAGS = +# CPU_CFLAGS = +# CPU_LDFLAGS = +# CPU_ASFLAGS = + +include $(RTE_SDK)/mk/rte.helper.mk + +MACHINE_CFLAGS += $(call rte_cc_has_argument, -march=-mcpu=armv8.2-a+crc+crypto+lse) +MACHINE_CFLAGS += $(call rte_cc_has_argument, -mcpu=octeontx2) -- 2.21.0