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PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: marvell.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: ra3ETTaILj9dKZOszO50Eg5frk5eqOn9kzE2SGD7EyoZjz8B5h+0XK5M9byblRZSVf51CkcfbfN3jEfxrsZLwdPcLAODiJsiGfjC/nXYK5pNR3fWbGa8J6EqX1ZnWcUQ1h100iOPsU7S3My8UR92Y0JiU8Z8/tNEIq3ryiQ5wP+PdpyNdm4AtiuaflKmngytsK0iyp/EOqOCC17B4AYsk9OtAMbLHcWmtf4j5Sfvx2oGmzbT5sUKq04zpiOBm88n51zTKyE791yUvNFjcTn5zeMLn1fAzjWVEVnhFJGQ6lVTGItKAFupb2DOgP4x0K3YK8Ken9GhjRD+Yv3BGp65Kn2JBM3O96mLm0UQqsvLUDc92zn3fVezUt6UhK0XcQpihT4gI6nseykktNtVKaX77NCTDSXkdMNCQ1QpzGwvSPM= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 316ee081-1613-4478-cad9-08d6bfe0d3fa X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Apr 2019 07:22:46.7800 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR18MB2918 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-04-13_02:, , signatures=0 Subject: Re: [dpdk-dev] [EXT] [PATCH 5/6] build: add option for armv8 crypto extension X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190413072246.TMtPM7DJ2ktD5q4ifaLipR7NtNIuIMJkwjVJgHXZ8oI@z> > -----Original Message----- > From: Yongseok Koh > Sent: Saturday, April 13, 2019 4:55 AM > To: bruce.richardson@intel.com; Jerin Jacob Kollanukkaran > ; Pavan Nikhilesh Bhagavatula > ; shahafs@mellanox.com > Cc: dev@dpdk.org; thomas@monjalon.net; gavin.hu@arm.com; > Honnappa.Nagarahalli@arm.com > Subject: [EXT] [PATCH 5/6] build: add option for armv8 crypto extension >=20 > CONFIG_RTE_MACHINE=3D"armv8a" > +CONFIG_RTE_ENABLE_ARMV8_CRYPTO=3Dy This approach is not scalable. Even, it is not good for BlueField as you=20 you need to maintain two images. Unlike other CPU flags, arm64's crypto cpu flag is really _optional_. Access to crypto instructions is always at under runtime check. See the following in rte_armv8_pmd.c /* Check CPU for support for AES instruction set */ if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) { ARMV8_CRYPTO_LOG_ERR( "AES instructions not supported by CPU"); return -EFAULT; } /* Check CPU for support for SHA instruction set */ if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_SHA1) || !rte_cpu_get_flag_enabled(RTE_CPUFLAG_SHA2)) { ARMV8_CRYPTO_LOG_ERR( "SHA1/SHA2 instructions not supported by CPU"); return -EFAULT; } So In order to avoid one more config flags specific to armv8 in meson and m= akefile build infra And avoid the need for 6/6 patch. IMO, # Introduce optional CPU flag scheme in eal. Treat armv8 crypto as optional= flag # Skip the eal init check for optional flag. Do you see any issues with that approach?