[dpdk-dev] [PATCH 0/6] minor fixes and updates for NXP crypto PMDs

[dpdk-dev] [PATCH 0/6] minor fixes and updates for NXP crypto PMDs

[Akhil Goyal]

dpaa2_sec and dpaa_sec are updated with some fixes
for cleanup and some performance optimizations.

The last patch is to make the dpaa2_sec PMD multi-process safe.

Akhil Goyal (6):
  crypto/dpaa2_sec: fix session clear
  crypto/dpaa2_sec: fix offset calculation for gcm
  drivers/crypto: update inline desc for sharing mode
  crypto/dpaa2_sec: remove unnecessary flc configurations
  crypto/dpaa_sec: fix session qp attach/detach
  crypto/dpaa2_sec: support multi process

 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h     |  2 +-
 drivers/crypto/caam_jr/caam_jr.c            | 13 ++--
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 74 +++++++--------------
 drivers/crypto/dpaa2_sec/hw/desc/algo.h     | 18 +++--
 drivers/crypto/dpaa2_sec/hw/desc/ipsec.h    | 10 +--
 drivers/crypto/dpaa_sec/dpaa_sec.c          | 27 ++++----
 6 files changed, 65 insertions(+), 79 deletions(-)

-- 
2.17.1

[dpdk-dev] [PATCH 0/6] minor fixes and updates for NXP crypto PMDs

[Akhil Goyal]

dpaa2_sec and dpaa_sec are updated with some fixes
for cleanup and some performance optimizations.

The last patch is to make the dpaa2_sec PMD multi-process safe.

Akhil Goyal (6):
  crypto/dpaa2_sec: fix session clear
  crypto/dpaa2_sec: fix offset calculation for gcm
  drivers/crypto: update inline desc for sharing mode
  crypto/dpaa2_sec: remove unnecessary flc configurations
  crypto/dpaa_sec: fix session qp attach/detach
  crypto/dpaa2_sec: support multi process

 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h     |  2 +-
 drivers/crypto/caam_jr/caam_jr.c            | 13 ++--
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 74 +++++++--------------
 drivers/crypto/dpaa2_sec/hw/desc/algo.h     | 18 +++--
 drivers/crypto/dpaa2_sec/hw/desc/ipsec.h    | 10 +--
 drivers/crypto/dpaa_sec/dpaa_sec.c          | 27 ++++----
 6 files changed, 65 insertions(+), 79 deletions(-)

-- 
2.17.1

[dpdk-dev] [PATCH 1/6] crypto/dpaa2_sec: fix session clear

[Akhil Goyal]

private data should be cleared instead of the complete session

Fixes: 8d1f3a5d751b ("crypto/dpaa2_sec: support crypto operation")
Cc: stable@dpdk.org

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index c2c22515d..d955ffc45 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -2912,7 +2912,7 @@ dpaa2_sec_sym_session_clear(struct rte_cryptodev *dev,
 		rte_free(s->ctxt);
 		rte_free(s->cipher_key.data);
 		rte_free(s->auth_key.data);
-		memset(sess, 0, sizeof(dpaa2_sec_session));
+		memset(s, 0, sizeof(dpaa2_sec_session));
 		struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
 		set_sym_session_private_data(sess, index, NULL);
 		rte_mempool_put(sess_mp, sess_priv);
-- 
2.17.1

[dpdk-dev] [PATCH 1/6] crypto/dpaa2_sec: fix session clear

[Akhil Goyal]

private data should be cleared instead of the complete session

Fixes: 8d1f3a5d751b ("crypto/dpaa2_sec: support crypto operation")
Cc: stable@dpdk.org

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index c2c22515d..d955ffc45 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -2912,7 +2912,7 @@ dpaa2_sec_sym_session_clear(struct rte_cryptodev *dev,
 		rte_free(s->ctxt);
 		rte_free(s->cipher_key.data);
 		rte_free(s->auth_key.data);
-		memset(sess, 0, sizeof(dpaa2_sec_session));
+		memset(s, 0, sizeof(dpaa2_sec_session));
 		struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
 		set_sym_session_private_data(sess, index, NULL);
 		rte_mempool_put(sess_mp, sess_priv);
-- 
2.17.1

[dpdk-dev] [PATCH 2/6] crypto/dpaa2_sec: fix offset calculation for gcm

[Akhil Goyal]

In case of gcm, output buffer should have aad space
before the actual buffer which needs to be written.
CAAM will not write into the aad anything, it will skip
auth_only_len (aad) and write the buffer afterwards.

Fixes: 37f96eb01bce ("crypto/dpaa2_sec: support scatter gather")
Cc: stable@dpdk.org

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index d955ffc45..7e762d4b8 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -236,8 +236,8 @@ build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
 
 	/* Configure Output SGE for Encap/Decap */
 	DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
-	DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off + sym_op->aead.data.offset -
-								auth_only_len);
+	DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off +
+			RTE_ALIGN_CEIL(auth_only_len, 16) - auth_only_len);
 	sge->length = mbuf->data_len - sym_op->aead.data.offset + auth_only_len;
 
 	mbuf = mbuf->next;
@@ -400,8 +400,8 @@ build_authenc_gcm_fd(dpaa2_sec_session *sess,
 
 	/* Configure Output SGE for Encap/Decap */
 	DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst));
-	DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
-				dst->data_off - auth_only_len);
+	DPAA2_SET_FLE_OFFSET(sge, dst->data_off +
+			RTE_ALIGN_CEIL(auth_only_len, 16) - auth_only_len);
 	sge->length = sym_op->aead.data.length + auth_only_len;
 
 	if (sess->dir == DIR_ENC) {
-- 
2.17.1

[dpdk-dev] [PATCH 2/6] crypto/dpaa2_sec: fix offset calculation for gcm

[Akhil Goyal]

In case of gcm, output buffer should have aad space
before the actual buffer which needs to be written.
CAAM will not write into the aad anything, it will skip
auth_only_len (aad) and write the buffer afterwards.

Fixes: 37f96eb01bce ("crypto/dpaa2_sec: support scatter gather")
Cc: stable@dpdk.org

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index d955ffc45..7e762d4b8 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -236,8 +236,8 @@ build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
 
 	/* Configure Output SGE for Encap/Decap */
 	DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
-	DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off + sym_op->aead.data.offset -
-								auth_only_len);
+	DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off +
+			RTE_ALIGN_CEIL(auth_only_len, 16) - auth_only_len);
 	sge->length = mbuf->data_len - sym_op->aead.data.offset + auth_only_len;
 
 	mbuf = mbuf->next;
@@ -400,8 +400,8 @@ build_authenc_gcm_fd(dpaa2_sec_session *sess,
 
 	/* Configure Output SGE for Encap/Decap */
 	DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst));
-	DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
-				dst->data_off - auth_only_len);
+	DPAA2_SET_FLE_OFFSET(sge, dst->data_off +
+			RTE_ALIGN_CEIL(auth_only_len, 16) - auth_only_len);
 	sge->length = sym_op->aead.data.length + auth_only_len;
 
 	if (sess->dir == DIR_ENC) {
-- 
2.17.1

[dpdk-dev] [PATCH 3/6] drivers/crypto: update inline desc for sharing mode

[Akhil Goyal]

SEC HW descriptor sharing mode can now be controlled
during Session preparation by the respective drivers

shared descriptors in case of non-protocol offload does not need
any sync between the subsequent jobs. Thus, changing it to
SHR_NEVER from SHR_SERIAL for cipher_only, auth_only, and gcm.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/crypto/caam_jr/caam_jr.c            | 13 +++++++------
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 11 ++++++-----
 drivers/crypto/dpaa2_sec/hw/desc/algo.h     | 18 +++++++++++++-----
 drivers/crypto/dpaa2_sec/hw/desc/ipsec.h    | 10 ++++++----
 drivers/crypto/dpaa_sec/dpaa_sec.c          | 10 +++++-----
 5 files changed, 37 insertions(+), 25 deletions(-)

diff --git a/drivers/crypto/caam_jr/caam_jr.c b/drivers/crypto/caam_jr/caam_jr.c
index 0263170fd..f647b36cb 100644
--- a/drivers/crypto/caam_jr/caam_jr.c
+++ b/drivers/crypto/caam_jr/caam_jr.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2017-2018 NXP
+ * Copyright 2017-2019 NXP
  */
 
 #include <fcntl.h>
@@ -346,7 +346,7 @@ caam_jr_prep_cdb(struct caam_jr_session *ses)
 
 		shared_desc_len = cnstr_shdsc_blkcipher(
 						cdb->sh_desc, true,
-						swap, &alginfo_c,
+						swap, SHR_NEVER, &alginfo_c,
 						NULL,
 						ses->iv.length,
 						ses->dir);
@@ -364,7 +364,7 @@ caam_jr_prep_cdb(struct caam_jr_session *ses)
 		alginfo_a.key_type = RTA_DATA_IMM;
 
 		shared_desc_len = cnstr_shdsc_hmac(cdb->sh_desc, true,
-						   swap, &alginfo_a,
+						   swap, SHR_NEVER, &alginfo_a,
 						   !ses->dir,
 						   ses->digest_length);
 	} else if (is_aead(ses)) {
@@ -382,13 +382,13 @@ caam_jr_prep_cdb(struct caam_jr_session *ses)
 		if (ses->dir == DIR_ENC)
 			shared_desc_len = cnstr_shdsc_gcm_encap(
 					cdb->sh_desc, true, swap,
-					&alginfo,
+					SHR_NEVER, &alginfo,
 					ses->iv.length,
 					ses->digest_length);
 		else
 			shared_desc_len = cnstr_shdsc_gcm_decap(
 					cdb->sh_desc, true, swap,
-					&alginfo,
+					SHR_NEVER, &alginfo,
 					ses->iv.length,
 					ses->digest_length);
 	} else {
@@ -465,7 +465,8 @@ caam_jr_prep_cdb(struct caam_jr_session *ses)
 			 * overwritten in fd for each packet.
 			 */
 			shared_desc_len = cnstr_shdsc_authenc(cdb->sh_desc,
-					true, swap, &alginfo_c, &alginfo_a,
+					true, swap, SHR_SERIAL,
+					&alginfo_c, &alginfo_a,
 					ses->iv.length, 0,
 					ses->digest_length, ses->dir);
 		}
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 7e762d4b8..9c7f2da04 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1672,7 +1672,7 @@ dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
 	session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
 				DIR_ENC : DIR_DEC;
 
-	bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0,
+	bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0, SHR_NEVER,
 					&cipherdata, NULL, session->iv.length,
 					session->dir);
 	if (bufsize < 0) {
@@ -1804,7 +1804,7 @@ dpaa2_sec_auth_init(struct rte_cryptodev *dev,
 				DIR_ENC : DIR_DEC;
 
 	bufsize = cnstr_shdsc_hmac(priv->flc_desc[DESC_INITFINAL].desc,
-				   1, 0, &authdata, !session->dir,
+				   1, 0, SHR_NEVER, &authdata, !session->dir,
 				   session->digest_length);
 	if (bufsize < 0) {
 		DPAA2_SEC_ERR("Crypto: Invalid buffer length");
@@ -1923,12 +1923,12 @@ dpaa2_sec_aead_init(struct rte_cryptodev *dev,
 
 	if (session->dir == DIR_ENC)
 		bufsize = cnstr_shdsc_gcm_encap(
-				priv->flc_desc[0].desc, 1, 0,
+				priv->flc_desc[0].desc, 1, 0, SHR_NEVER,
 				&aeaddata, session->iv.length,
 				session->digest_length);
 	else
 		bufsize = cnstr_shdsc_gcm_decap(
-				priv->flc_desc[0].desc, 1, 0,
+				priv->flc_desc[0].desc, 1, 0, SHR_NEVER,
 				&aeaddata, session->iv.length,
 				session->digest_length);
 	if (bufsize < 0) {
@@ -2152,7 +2152,8 @@ dpaa2_sec_aead_chain_init(struct rte_cryptodev *dev,
 
 	if (session->ctxt_type == DPAA2_SEC_CIPHER_HASH) {
 		bufsize = cnstr_shdsc_authenc(priv->flc_desc[0].desc, 1,
-					      0, &cipherdata, &authdata,
+					      0, SHR_SERIAL,
+					      &cipherdata, &authdata,
 					      session->iv.length,
 					      ctxt->auth_only_len,
 					      session->digest_length,
diff --git a/drivers/crypto/dpaa2_sec/hw/desc/algo.h b/drivers/crypto/dpaa2_sec/hw/desc/algo.h
index febcb6d0a..b6cfa8704 100644
--- a/drivers/crypto/dpaa2_sec/hw/desc/algo.h
+++ b/drivers/crypto/dpaa2_sec/hw/desc/algo.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2008-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP
+ * Copyright 2016,2019 NXP
  *
  */
 
@@ -125,6 +125,7 @@ cnstr_shdsc_snow_f9(uint32_t *descbuf, bool ps, bool swap,
  * @descbuf: pointer to descriptor-under-construction buffer
  * @ps: if 36/40bit addressing is desired, this parameter must be true
  * @swap: must be true when core endianness doesn't match SEC endianness
+ * @share: sharing type of shared descriptor
  * @cipherdata: pointer to block cipher transform definitions
  *              Valid algorithm values one of OP_ALG_ALGSEL_* {DES, 3DES, AES}
  *              Valid modes for:
@@ -138,6 +139,7 @@ cnstr_shdsc_snow_f9(uint32_t *descbuf, bool ps, bool swap,
  */
 static inline int
 cnstr_shdsc_blkcipher(uint32_t *descbuf, bool ps, bool swap,
+		      enum rta_share_type share,
 		      struct alginfo *cipherdata, uint8_t *iv,
 		      uint32_t ivlen, uint8_t dir)
 {
@@ -157,7 +159,7 @@ cnstr_shdsc_blkcipher(uint32_t *descbuf, bool ps, bool swap,
 		PROGRAM_SET_BSWAP(p);
 	if (ps)
 		PROGRAM_SET_36BIT_ADDR(p);
-	SHR_HDR(p, SHR_SERIAL, 1, SC);
+	SHR_HDR(p, share, 1, SC);
 
 	pkeyjmp = JUMP(p, keyjmp, LOCAL_JUMP, ALL_TRUE, SHRD);
 	/* Insert Key */
@@ -211,6 +213,7 @@ cnstr_shdsc_blkcipher(uint32_t *descbuf, bool ps, bool swap,
  * @descbuf: pointer to descriptor-under-construction buffer
  * @ps: if 36/40bit addressing is desired, this parameter must be true
  * @swap: must be true when core endianness doesn't match SEC endianness
+ * @share: sharing type of shared descriptor
  * @authdata: pointer to authentication transform definitions;
  *            message digest algorithm: OP_ALG_ALGSEL_MD5/ SHA1-512.
  * @do_icv: 0 if ICV checking is not desired, any other value if ICV checking
@@ -225,6 +228,7 @@ cnstr_shdsc_blkcipher(uint32_t *descbuf, bool ps, bool swap,
  */
 static inline int
 cnstr_shdsc_hmac(uint32_t *descbuf, bool ps, bool swap,
+		 enum rta_share_type share,
 		 struct alginfo *authdata, uint8_t do_icv,
 		 uint8_t trunc_len)
 {
@@ -270,7 +274,7 @@ cnstr_shdsc_hmac(uint32_t *descbuf, bool ps, bool swap,
 		PROGRAM_SET_BSWAP(p);
 	if (ps)
 		PROGRAM_SET_36BIT_ADDR(p);
-	SHR_HDR(p, SHR_SERIAL, 1, SC);
+	SHR_HDR(p, share, 1, SC);
 
 	pkeyjmp = JUMP(p, keyjmp, LOCAL_JUMP, ALL_TRUE, SHRD);
 	KEY(p, KEY2, authdata->key_enc_flags, authdata->key, authdata->keylen,
@@ -443,6 +447,7 @@ cnstr_shdsc_crc(uint32_t *descbuf, bool swap)
  * @descbuf: pointer to descriptor-under-construction buffer
  * @ps: if 36/40bit addressing is desired, this parameter must be true
  * @swap: must be true when core endianness doesn't match SEC endianness
+ * @share: sharing type of shared descriptor
  * @cipherdata: pointer to block cipher transform definitions
  *		Valid algorithm values - OP_ALG_ALGSEL_AES ANDed with
  *		OP_ALG_AAI_GCM.
@@ -453,6 +458,7 @@ cnstr_shdsc_crc(uint32_t *descbuf, bool swap)
  */
 static inline int
 cnstr_shdsc_gcm_encap(uint32_t *descbuf, bool ps, bool swap,
+		      enum rta_share_type share,
 		      struct alginfo *cipherdata,
 		      uint32_t ivlen, uint32_t icvsize)
 {
@@ -475,7 +481,7 @@ cnstr_shdsc_gcm_encap(uint32_t *descbuf, bool ps, bool swap,
 	if (ps)
 		PROGRAM_SET_36BIT_ADDR(p);
 
-	SHR_HDR(p, SHR_SERIAL, 1, SC);
+	SHR_HDR(p, share, 1, SC);
 
 	pkeyjmp = JUMP(p, keyjmp, LOCAL_JUMP, ALL_TRUE, SELF | SHRD);
 	/* Insert Key */
@@ -556,6 +562,7 @@ cnstr_shdsc_gcm_encap(uint32_t *descbuf, bool ps, bool swap,
  * @descbuf: pointer to descriptor-under-construction buffer
  * @ps: if 36/40bit addressing is desired, this parameter must be true
  * @swap: must be true when core endianness doesn't match SEC endianness
+ * @share: sharing type of shared descriptor
  * @cipherdata: pointer to block cipher transform definitions
  *		Valid algorithm values - OP_ALG_ALGSEL_AES ANDed with
  *		OP_ALG_AAI_GCM.
@@ -565,6 +572,7 @@ cnstr_shdsc_gcm_encap(uint32_t *descbuf, bool ps, bool swap,
  */
 static inline int
 cnstr_shdsc_gcm_decap(uint32_t *descbuf, bool ps, bool swap,
+		      enum rta_share_type share,
 		      struct alginfo *cipherdata,
 		      uint32_t ivlen, uint32_t icvsize)
 {
@@ -585,7 +593,7 @@ cnstr_shdsc_gcm_decap(uint32_t *descbuf, bool ps, bool swap,
 	if (ps)
 		PROGRAM_SET_36BIT_ADDR(p);
 
-	SHR_HDR(p, SHR_SERIAL, 1, SC);
+	SHR_HDR(p, share, 1, SC);
 
 	pkeyjmp = JUMP(p, keyjmp, LOCAL_JUMP, ALL_TRUE, SELF | SHRD);
 	/* Insert Key */
diff --git a/drivers/crypto/dpaa2_sec/hw/desc/ipsec.h b/drivers/crypto/dpaa2_sec/hw/desc/ipsec.h
index d256a391b..d071f46fd 100644
--- a/drivers/crypto/dpaa2_sec/hw/desc/ipsec.h
+++ b/drivers/crypto/dpaa2_sec/hw/desc/ipsec.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2008-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP
+ * Copyright 2016,2019 NXP
  *
  */
 
@@ -1188,7 +1188,7 @@ cnstr_shdsc_ipsec_decap_des_aes_xcbc(uint32_t *descbuf,
 static inline int
 cnstr_shdsc_ipsec_new_encap(uint32_t *descbuf, bool ps,
 			    bool swap,
-					      enum rta_share_type share,
+			    enum rta_share_type share,
 			    struct ipsec_encap_pdb *pdb,
 			    uint8_t *opt_ip_hdr,
 			    struct alginfo *cipherdata,
@@ -1306,7 +1306,7 @@ cnstr_shdsc_ipsec_new_encap(uint32_t *descbuf, bool ps,
 static inline int
 cnstr_shdsc_ipsec_new_decap(uint32_t *descbuf, bool ps,
 			    bool swap,
-					      enum rta_share_type share,
+			    enum rta_share_type share,
 			    struct ipsec_decap_pdb *pdb,
 			    struct alginfo *cipherdata,
 			    struct alginfo *authdata)
@@ -1397,6 +1397,7 @@ cnstr_shdsc_ipsec_new_decap(uint32_t *descbuf, bool ps,
  * @descbuf: pointer to buffer used for descriptor construction
  * @ps: if 36/40bit addressing is desired, this parameter must be true
  * @swap: if true, perform descriptor byte swapping on a 4-byte boundary
+ * @share: sharing type of shared descriptor
  * @cipherdata: pointer to block cipher transform definitions.
  *              Valid algorithm values one of OP_ALG_ALGSEL_* {DES, 3DES, AES}
  *              Valid modes for:
@@ -1461,6 +1462,7 @@ cnstr_shdsc_ipsec_new_decap(uint32_t *descbuf, bool ps,
  */
 static inline int
 cnstr_shdsc_authenc(uint32_t *descbuf, bool ps, bool swap,
+		    enum rta_share_type share,
 		    struct alginfo *cipherdata,
 		    struct alginfo *authdata,
 		    uint16_t ivlen, uint16_t auth_only_len,
@@ -1496,7 +1498,7 @@ cnstr_shdsc_authenc(uint32_t *descbuf, bool ps, bool swap,
 	trunc_len = trunc_len && (trunc_len < authdata->keylen) ?
 			trunc_len : (uint8_t)authdata->keylen;
 
-	SHR_HDR(p, SHR_SERIAL, 1, SC);
+	SHR_HDR(p, share, 1, SC);
 
 	/*
 	 * M0 will contain the value provided by the user when creating
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index 39533a9cc..cb99be4e1 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -643,7 +643,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
 
 		shared_desc_len = cnstr_shdsc_blkcipher(
 						cdb->sh_desc, true,
-						swap, &alginfo_c,
+						swap, SHR_NEVER, &alginfo_c,
 						NULL,
 						ses->iv.length,
 						ses->dir);
@@ -660,7 +660,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
 		alginfo_a.key_type = RTA_DATA_IMM;
 
 		shared_desc_len = cnstr_shdsc_hmac(cdb->sh_desc, true,
-						   swap, &alginfo_a,
+						   swap, SHR_NEVER, &alginfo_a,
 						   !ses->dir,
 						   ses->digest_length);
 	} else if (is_aead(ses)) {
@@ -676,13 +676,13 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
 
 		if (ses->dir == DIR_ENC)
 			shared_desc_len = cnstr_shdsc_gcm_encap(
-					cdb->sh_desc, true, swap,
+					cdb->sh_desc, true, swap, SHR_NEVER,
 					&alginfo,
 					ses->iv.length,
 					ses->digest_length);
 		else
 			shared_desc_len = cnstr_shdsc_gcm_decap(
-					cdb->sh_desc, true, swap,
+					cdb->sh_desc, true, swap, SHR_NEVER,
 					&alginfo,
 					ses->iv.length,
 					ses->digest_length);
@@ -741,7 +741,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
 		 * overwritten in fd for each packet.
 		 */
 		shared_desc_len = cnstr_shdsc_authenc(cdb->sh_desc,
-				true, swap, &alginfo_c, &alginfo_a,
+				true, swap, SHR_SERIAL, &alginfo_c, &alginfo_a,
 				ses->iv.length, 0,
 				ses->digest_length, ses->dir);
 	}
-- 
2.17.1

[dpdk-dev] [PATCH 3/6] drivers/crypto: update inline desc for sharing mode

[Akhil Goyal]

SEC HW descriptor sharing mode can now be controlled
during Session preparation by the respective drivers

shared descriptors in case of non-protocol offload does not need
any sync between the subsequent jobs. Thus, changing it to
SHR_NEVER from SHR_SERIAL for cipher_only, auth_only, and gcm.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/crypto/caam_jr/caam_jr.c            | 13 +++++++------
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 11 ++++++-----
 drivers/crypto/dpaa2_sec/hw/desc/algo.h     | 18 +++++++++++++-----
 drivers/crypto/dpaa2_sec/hw/desc/ipsec.h    | 10 ++++++----
 drivers/crypto/dpaa_sec/dpaa_sec.c          | 10 +++++-----
 5 files changed, 37 insertions(+), 25 deletions(-)

diff --git a/drivers/crypto/caam_jr/caam_jr.c b/drivers/crypto/caam_jr/caam_jr.c
index 0263170fd..f647b36cb 100644
--- a/drivers/crypto/caam_jr/caam_jr.c
+++ b/drivers/crypto/caam_jr/caam_jr.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2017-2018 NXP
+ * Copyright 2017-2019 NXP
  */
 
 #include <fcntl.h>
@@ -346,7 +346,7 @@ caam_jr_prep_cdb(struct caam_jr_session *ses)
 
 		shared_desc_len = cnstr_shdsc_blkcipher(
 						cdb->sh_desc, true,
-						swap, &alginfo_c,
+						swap, SHR_NEVER, &alginfo_c,
 						NULL,
 						ses->iv.length,
 						ses->dir);
@@ -364,7 +364,7 @@ caam_jr_prep_cdb(struct caam_jr_session *ses)
 		alginfo_a.key_type = RTA_DATA_IMM;
 
 		shared_desc_len = cnstr_shdsc_hmac(cdb->sh_desc, true,
-						   swap, &alginfo_a,
+						   swap, SHR_NEVER, &alginfo_a,
 						   !ses->dir,
 						   ses->digest_length);
 	} else if (is_aead(ses)) {
@@ -382,13 +382,13 @@ caam_jr_prep_cdb(struct caam_jr_session *ses)
 		if (ses->dir == DIR_ENC)
 			shared_desc_len = cnstr_shdsc_gcm_encap(
 					cdb->sh_desc, true, swap,
-					&alginfo,
+					SHR_NEVER, &alginfo,
 					ses->iv.length,
 					ses->digest_length);
 		else
 			shared_desc_len = cnstr_shdsc_gcm_decap(
 					cdb->sh_desc, true, swap,
-					&alginfo,
+					SHR_NEVER, &alginfo,
 					ses->iv.length,
 					ses->digest_length);
 	} else {
@@ -465,7 +465,8 @@ caam_jr_prep_cdb(struct caam_jr_session *ses)
 			 * overwritten in fd for each packet.
 			 */
 			shared_desc_len = cnstr_shdsc_authenc(cdb->sh_desc,
-					true, swap, &alginfo_c, &alginfo_a,
+					true, swap, SHR_SERIAL,
+					&alginfo_c, &alginfo_a,
 					ses->iv.length, 0,
 					ses->digest_length, ses->dir);
 		}
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 7e762d4b8..9c7f2da04 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1672,7 +1672,7 @@ dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
 	session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
 				DIR_ENC : DIR_DEC;
 
-	bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0,
+	bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0, SHR_NEVER,
 					&cipherdata, NULL, session->iv.length,
 					session->dir);
 	if (bufsize < 0) {
@@ -1804,7 +1804,7 @@ dpaa2_sec_auth_init(struct rte_cryptodev *dev,
 				DIR_ENC : DIR_DEC;
 
 	bufsize = cnstr_shdsc_hmac(priv->flc_desc[DESC_INITFINAL].desc,
-				   1, 0, &authdata, !session->dir,
+				   1, 0, SHR_NEVER, &authdata, !session->dir,
 				   session->digest_length);
 	if (bufsize < 0) {
 		DPAA2_SEC_ERR("Crypto: Invalid buffer length");
@@ -1923,12 +1923,12 @@ dpaa2_sec_aead_init(struct rte_cryptodev *dev,
 
 	if (session->dir == DIR_ENC)
 		bufsize = cnstr_shdsc_gcm_encap(
-				priv->flc_desc[0].desc, 1, 0,
+				priv->flc_desc[0].desc, 1, 0, SHR_NEVER,
 				&aeaddata, session->iv.length,
 				session->digest_length);
 	else
 		bufsize = cnstr_shdsc_gcm_decap(
-				priv->flc_desc[0].desc, 1, 0,
+				priv->flc_desc[0].desc, 1, 0, SHR_NEVER,
 				&aeaddata, session->iv.length,
 				session->digest_length);
 	if (bufsize < 0) {
@@ -2152,7 +2152,8 @@ dpaa2_sec_aead_chain_init(struct rte_cryptodev *dev,
 
 	if (session->ctxt_type == DPAA2_SEC_CIPHER_HASH) {
 		bufsize = cnstr_shdsc_authenc(priv->flc_desc[0].desc, 1,
-					      0, &cipherdata, &authdata,
+					      0, SHR_SERIAL,
+					      &cipherdata, &authdata,
 					      session->iv.length,
 					      ctxt->auth_only_len,
 					      session->digest_length,
diff --git a/drivers/crypto/dpaa2_sec/hw/desc/algo.h b/drivers/crypto/dpaa2_sec/hw/desc/algo.h
index febcb6d0a..b6cfa8704 100644
--- a/drivers/crypto/dpaa2_sec/hw/desc/algo.h
+++ b/drivers/crypto/dpaa2_sec/hw/desc/algo.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2008-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP
+ * Copyright 2016,2019 NXP
  *
  */
 
@@ -125,6 +125,7 @@ cnstr_shdsc_snow_f9(uint32_t *descbuf, bool ps, bool swap,
  * @descbuf: pointer to descriptor-under-construction buffer
  * @ps: if 36/40bit addressing is desired, this parameter must be true
  * @swap: must be true when core endianness doesn't match SEC endianness
+ * @share: sharing type of shared descriptor
  * @cipherdata: pointer to block cipher transform definitions
  *              Valid algorithm values one of OP_ALG_ALGSEL_* {DES, 3DES, AES}
  *              Valid modes for:
@@ -138,6 +139,7 @@ cnstr_shdsc_snow_f9(uint32_t *descbuf, bool ps, bool swap,
  */
 static inline int
 cnstr_shdsc_blkcipher(uint32_t *descbuf, bool ps, bool swap,
+		      enum rta_share_type share,
 		      struct alginfo *cipherdata, uint8_t *iv,
 		      uint32_t ivlen, uint8_t dir)
 {
@@ -157,7 +159,7 @@ cnstr_shdsc_blkcipher(uint32_t *descbuf, bool ps, bool swap,
 		PROGRAM_SET_BSWAP(p);
 	if (ps)
 		PROGRAM_SET_36BIT_ADDR(p);
-	SHR_HDR(p, SHR_SERIAL, 1, SC);
+	SHR_HDR(p, share, 1, SC);
 
 	pkeyjmp = JUMP(p, keyjmp, LOCAL_JUMP, ALL_TRUE, SHRD);
 	/* Insert Key */
@@ -211,6 +213,7 @@ cnstr_shdsc_blkcipher(uint32_t *descbuf, bool ps, bool swap,
  * @descbuf: pointer to descriptor-under-construction buffer
  * @ps: if 36/40bit addressing is desired, this parameter must be true
  * @swap: must be true when core endianness doesn't match SEC endianness
+ * @share: sharing type of shared descriptor
  * @authdata: pointer to authentication transform definitions;
  *            message digest algorithm: OP_ALG_ALGSEL_MD5/ SHA1-512.
  * @do_icv: 0 if ICV checking is not desired, any other value if ICV checking
@@ -225,6 +228,7 @@ cnstr_shdsc_blkcipher(uint32_t *descbuf, bool ps, bool swap,
  */
 static inline int
 cnstr_shdsc_hmac(uint32_t *descbuf, bool ps, bool swap,
+		 enum rta_share_type share,
 		 struct alginfo *authdata, uint8_t do_icv,
 		 uint8_t trunc_len)
 {
@@ -270,7 +274,7 @@ cnstr_shdsc_hmac(uint32_t *descbuf, bool ps, bool swap,
 		PROGRAM_SET_BSWAP(p);
 	if (ps)
 		PROGRAM_SET_36BIT_ADDR(p);
-	SHR_HDR(p, SHR_SERIAL, 1, SC);
+	SHR_HDR(p, share, 1, SC);
 
 	pkeyjmp = JUMP(p, keyjmp, LOCAL_JUMP, ALL_TRUE, SHRD);
 	KEY(p, KEY2, authdata->key_enc_flags, authdata->key, authdata->keylen,
@@ -443,6 +447,7 @@ cnstr_shdsc_crc(uint32_t *descbuf, bool swap)
  * @descbuf: pointer to descriptor-under-construction buffer
  * @ps: if 36/40bit addressing is desired, this parameter must be true
  * @swap: must be true when core endianness doesn't match SEC endianness
+ * @share: sharing type of shared descriptor
  * @cipherdata: pointer to block cipher transform definitions
  *		Valid algorithm values - OP_ALG_ALGSEL_AES ANDed with
  *		OP_ALG_AAI_GCM.
@@ -453,6 +458,7 @@ cnstr_shdsc_crc(uint32_t *descbuf, bool swap)
  */
 static inline int
 cnstr_shdsc_gcm_encap(uint32_t *descbuf, bool ps, bool swap,
+		      enum rta_share_type share,
 		      struct alginfo *cipherdata,
 		      uint32_t ivlen, uint32_t icvsize)
 {
@@ -475,7 +481,7 @@ cnstr_shdsc_gcm_encap(uint32_t *descbuf, bool ps, bool swap,
 	if (ps)
 		PROGRAM_SET_36BIT_ADDR(p);
 
-	SHR_HDR(p, SHR_SERIAL, 1, SC);
+	SHR_HDR(p, share, 1, SC);
 
 	pkeyjmp = JUMP(p, keyjmp, LOCAL_JUMP, ALL_TRUE, SELF | SHRD);
 	/* Insert Key */
@@ -556,6 +562,7 @@ cnstr_shdsc_gcm_encap(uint32_t *descbuf, bool ps, bool swap,
  * @descbuf: pointer to descriptor-under-construction buffer
  * @ps: if 36/40bit addressing is desired, this parameter must be true
  * @swap: must be true when core endianness doesn't match SEC endianness
+ * @share: sharing type of shared descriptor
  * @cipherdata: pointer to block cipher transform definitions
  *		Valid algorithm values - OP_ALG_ALGSEL_AES ANDed with
  *		OP_ALG_AAI_GCM.
@@ -565,6 +572,7 @@ cnstr_shdsc_gcm_encap(uint32_t *descbuf, bool ps, bool swap,
  */
 static inline int
 cnstr_shdsc_gcm_decap(uint32_t *descbuf, bool ps, bool swap,
+		      enum rta_share_type share,
 		      struct alginfo *cipherdata,
 		      uint32_t ivlen, uint32_t icvsize)
 {
@@ -585,7 +593,7 @@ cnstr_shdsc_gcm_decap(uint32_t *descbuf, bool ps, bool swap,
 	if (ps)
 		PROGRAM_SET_36BIT_ADDR(p);
 
-	SHR_HDR(p, SHR_SERIAL, 1, SC);
+	SHR_HDR(p, share, 1, SC);
 
 	pkeyjmp = JUMP(p, keyjmp, LOCAL_JUMP, ALL_TRUE, SELF | SHRD);
 	/* Insert Key */
diff --git a/drivers/crypto/dpaa2_sec/hw/desc/ipsec.h b/drivers/crypto/dpaa2_sec/hw/desc/ipsec.h
index d256a391b..d071f46fd 100644
--- a/drivers/crypto/dpaa2_sec/hw/desc/ipsec.h
+++ b/drivers/crypto/dpaa2_sec/hw/desc/ipsec.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2008-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP
+ * Copyright 2016,2019 NXP
  *
  */
 
@@ -1188,7 +1188,7 @@ cnstr_shdsc_ipsec_decap_des_aes_xcbc(uint32_t *descbuf,
 static inline int
 cnstr_shdsc_ipsec_new_encap(uint32_t *descbuf, bool ps,
 			    bool swap,
-					      enum rta_share_type share,
+			    enum rta_share_type share,
 			    struct ipsec_encap_pdb *pdb,
 			    uint8_t *opt_ip_hdr,
 			    struct alginfo *cipherdata,
@@ -1306,7 +1306,7 @@ cnstr_shdsc_ipsec_new_encap(uint32_t *descbuf, bool ps,
 static inline int
 cnstr_shdsc_ipsec_new_decap(uint32_t *descbuf, bool ps,
 			    bool swap,
-					      enum rta_share_type share,
+			    enum rta_share_type share,
 			    struct ipsec_decap_pdb *pdb,
 			    struct alginfo *cipherdata,
 			    struct alginfo *authdata)
@@ -1397,6 +1397,7 @@ cnstr_shdsc_ipsec_new_decap(uint32_t *descbuf, bool ps,
  * @descbuf: pointer to buffer used for descriptor construction
  * @ps: if 36/40bit addressing is desired, this parameter must be true
  * @swap: if true, perform descriptor byte swapping on a 4-byte boundary
+ * @share: sharing type of shared descriptor
  * @cipherdata: pointer to block cipher transform definitions.
  *              Valid algorithm values one of OP_ALG_ALGSEL_* {DES, 3DES, AES}
  *              Valid modes for:
@@ -1461,6 +1462,7 @@ cnstr_shdsc_ipsec_new_decap(uint32_t *descbuf, bool ps,
  */
 static inline int
 cnstr_shdsc_authenc(uint32_t *descbuf, bool ps, bool swap,
+		    enum rta_share_type share,
 		    struct alginfo *cipherdata,
 		    struct alginfo *authdata,
 		    uint16_t ivlen, uint16_t auth_only_len,
@@ -1496,7 +1498,7 @@ cnstr_shdsc_authenc(uint32_t *descbuf, bool ps, bool swap,
 	trunc_len = trunc_len && (trunc_len < authdata->keylen) ?
 			trunc_len : (uint8_t)authdata->keylen;
 
-	SHR_HDR(p, SHR_SERIAL, 1, SC);
+	SHR_HDR(p, share, 1, SC);
 
 	/*
 	 * M0 will contain the value provided by the user when creating
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index 39533a9cc..cb99be4e1 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -643,7 +643,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
 
 		shared_desc_len = cnstr_shdsc_blkcipher(
 						cdb->sh_desc, true,
-						swap, &alginfo_c,
+						swap, SHR_NEVER, &alginfo_c,
 						NULL,
 						ses->iv.length,
 						ses->dir);
@@ -660,7 +660,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
 		alginfo_a.key_type = RTA_DATA_IMM;
 
 		shared_desc_len = cnstr_shdsc_hmac(cdb->sh_desc, true,
-						   swap, &alginfo_a,
+						   swap, SHR_NEVER, &alginfo_a,
 						   !ses->dir,
 						   ses->digest_length);
 	} else if (is_aead(ses)) {
@@ -676,13 +676,13 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
 
 		if (ses->dir == DIR_ENC)
 			shared_desc_len = cnstr_shdsc_gcm_encap(
-					cdb->sh_desc, true, swap,
+					cdb->sh_desc, true, swap, SHR_NEVER,
 					&alginfo,
 					ses->iv.length,
 					ses->digest_length);
 		else
 			shared_desc_len = cnstr_shdsc_gcm_decap(
-					cdb->sh_desc, true, swap,
+					cdb->sh_desc, true, swap, SHR_NEVER,
 					&alginfo,
 					ses->iv.length,
 					ses->digest_length);
@@ -741,7 +741,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
 		 * overwritten in fd for each packet.
 		 */
 		shared_desc_len = cnstr_shdsc_authenc(cdb->sh_desc,
-				true, swap, &alginfo_c, &alginfo_a,
+				true, swap, SHR_SERIAL, &alginfo_c, &alginfo_a,
 				ses->iv.length, 0,
 				ses->digest_length, ses->dir);
 	}
-- 
2.17.1

[dpdk-dev] [PATCH 4/6] crypto/dpaa2_sec: remove unnecessary flc configurations

[Akhil Goyal]

The removed fields are required in case the SEC block
allocates the buffer from bman pool.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 27 ---------------------
 1 file changed, 27 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 9c7f2da04..31b7de679 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1679,17 +1679,8 @@ dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
 		DPAA2_SEC_ERR("Crypto: Descriptor build failed");
 		goto error_out;
 	}
-	flc->dhr = 0;
-	flc->bpv0 = 0x1;
-	flc->mode_bits = 0x8000;
 
 	flc->word1_sdl = (uint8_t)bufsize;
-	flc->word2_rflc_31_0 = lower_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
-	flc->word3_rflc_63_32 = upper_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
 	session->ctxt = priv;
 
 	for (i = 0; i < bufsize; i++)
@@ -1812,12 +1803,6 @@ dpaa2_sec_auth_init(struct rte_cryptodev *dev,
 	}
 
 	flc->word1_sdl = (uint8_t)bufsize;
-	flc->word2_rflc_31_0 = lower_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
-	flc->word3_rflc_63_32 = upper_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
 	session->ctxt = priv;
 	for (i = 0; i < bufsize; i++)
 		DPAA2_SEC_DEBUG("DESC[%d]:0x%x",
@@ -1937,12 +1922,6 @@ dpaa2_sec_aead_init(struct rte_cryptodev *dev,
 	}
 
 	flc->word1_sdl = (uint8_t)bufsize;
-	flc->word2_rflc_31_0 = lower_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
-	flc->word3_rflc_63_32 = upper_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
 	session->ctxt = priv;
 	for (i = 0; i < bufsize; i++)
 		DPAA2_SEC_DEBUG("DESC[%d]:0x%x\n",
@@ -2168,12 +2147,6 @@ dpaa2_sec_aead_chain_init(struct rte_cryptodev *dev,
 	}
 
 	flc->word1_sdl = (uint8_t)bufsize;
-	flc->word2_rflc_31_0 = lower_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
-	flc->word3_rflc_63_32 = upper_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
 	session->ctxt = priv;
 	for (i = 0; i < bufsize; i++)
 		DPAA2_SEC_DEBUG("DESC[%d]:0x%x",
-- 
2.17.1

[dpdk-dev] [PATCH 4/6] crypto/dpaa2_sec: remove unnecessary flc configurations

[Akhil Goyal]

The removed fields are required in case the SEC block
allocates the buffer from bman pool.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 27 ---------------------
 1 file changed, 27 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 9c7f2da04..31b7de679 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1679,17 +1679,8 @@ dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
 		DPAA2_SEC_ERR("Crypto: Descriptor build failed");
 		goto error_out;
 	}
-	flc->dhr = 0;
-	flc->bpv0 = 0x1;
-	flc->mode_bits = 0x8000;
 
 	flc->word1_sdl = (uint8_t)bufsize;
-	flc->word2_rflc_31_0 = lower_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
-	flc->word3_rflc_63_32 = upper_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
 	session->ctxt = priv;
 
 	for (i = 0; i < bufsize; i++)
@@ -1812,12 +1803,6 @@ dpaa2_sec_auth_init(struct rte_cryptodev *dev,
 	}
 
 	flc->word1_sdl = (uint8_t)bufsize;
-	flc->word2_rflc_31_0 = lower_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
-	flc->word3_rflc_63_32 = upper_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
 	session->ctxt = priv;
 	for (i = 0; i < bufsize; i++)
 		DPAA2_SEC_DEBUG("DESC[%d]:0x%x",
@@ -1937,12 +1922,6 @@ dpaa2_sec_aead_init(struct rte_cryptodev *dev,
 	}
 
 	flc->word1_sdl = (uint8_t)bufsize;
-	flc->word2_rflc_31_0 = lower_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
-	flc->word3_rflc_63_32 = upper_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
 	session->ctxt = priv;
 	for (i = 0; i < bufsize; i++)
 		DPAA2_SEC_DEBUG("DESC[%d]:0x%x\n",
@@ -2168,12 +2147,6 @@ dpaa2_sec_aead_chain_init(struct rte_cryptodev *dev,
 	}
 
 	flc->word1_sdl = (uint8_t)bufsize;
-	flc->word2_rflc_31_0 = lower_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
-	flc->word3_rflc_63_32 = upper_32_bits(
-			(size_t)&(((struct dpaa2_sec_qp *)
-			dev->data->queue_pairs[0])->rx_vq));
 	session->ctxt = priv;
 	for (i = 0; i < bufsize; i++)
 		DPAA2_SEC_DEBUG("DESC[%d]:0x%x",
-- 
2.17.1

[dpdk-dev] [PATCH 5/6] crypto/dpaa_sec: fix session qp attach/detach

[Akhil Goyal]

session inq and qp are assigned for each core from which the
packets arrive. This was not correctly handled while supporting
multiple sessions per queue pair.
This patch fixes the attach and detach of queues for each core.

Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per queue pair")
Cc: stable@dpdk.org
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index cb99be4e1..8305f19a3 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2017-2018 NXP
+ *   Copyright 2017-2019 NXP
  *
  */
 
@@ -1940,13 +1940,13 @@ dpaa_sec_attach_rxq(struct dpaa_sec_dev_private *qi)
 {
 	unsigned int i;
 
-	for (i = 0; i < qi->max_nb_sessions; i++) {
+	for (i = 0; i < qi->max_nb_sessions * MAX_DPAA_CORES; i++) {
 		if (qi->inq_attach[i] == 0) {
 			qi->inq_attach[i] = 1;
 			return &qi->inq[i];
 		}
 	}
-	DPAA_SEC_WARN("All ses session in use %x", qi->max_nb_sessions);
+	DPAA_SEC_WARN("All session in use %u", qi->max_nb_sessions);
 
 	return NULL;
 }
@@ -2115,7 +2115,7 @@ dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
 		struct rte_cryptodev_sym_session *sess)
 {
 	struct dpaa_sec_dev_private *qi = dev->data->dev_private;
-	uint8_t index = dev->driver_id;
+	uint8_t index = dev->driver_id, i;
 	void *sess_priv = get_sym_session_private_data(sess, index);
 
 	PMD_INIT_FUNC_TRACE();
@@ -2125,9 +2125,12 @@ dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
 	if (sess_priv) {
 		struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
 
-		if (s->inq[rte_lcore_id() % MAX_DPAA_CORES])
-			dpaa_sec_detach_rxq(qi,
-				s->inq[rte_lcore_id() % MAX_DPAA_CORES]);
+		for (i = 0; i < MAX_DPAA_CORES; i++) {
+			if (s->inq[i])
+				dpaa_sec_detach_rxq(qi, s->inq[i]);
+			s->inq[i] = NULL;
+			s->qp[i] = NULL;
+		}
 		rte_free(s->cipher_key.data);
 		rte_free(s->auth_key.data);
 		memset(s, 0, sizeof(dpaa_sec_session));
-- 
2.17.1

[dpdk-dev] [PATCH 5/6] crypto/dpaa_sec: fix session qp attach/detach

[Akhil Goyal]

session inq and qp are assigned for each core from which the
packets arrive. This was not correctly handled while supporting
multiple sessions per queue pair.
This patch fixes the attach and detach of queues for each core.

Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per queue pair")
Cc: stable@dpdk.org
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index cb99be4e1..8305f19a3 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2017-2018 NXP
+ *   Copyright 2017-2019 NXP
  *
  */
 
@@ -1940,13 +1940,13 @@ dpaa_sec_attach_rxq(struct dpaa_sec_dev_private *qi)
 {
 	unsigned int i;
 
-	for (i = 0; i < qi->max_nb_sessions; i++) {
+	for (i = 0; i < qi->max_nb_sessions * MAX_DPAA_CORES; i++) {
 		if (qi->inq_attach[i] == 0) {
 			qi->inq_attach[i] = 1;
 			return &qi->inq[i];
 		}
 	}
-	DPAA_SEC_WARN("All ses session in use %x", qi->max_nb_sessions);
+	DPAA_SEC_WARN("All session in use %u", qi->max_nb_sessions);
 
 	return NULL;
 }
@@ -2115,7 +2115,7 @@ dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
 		struct rte_cryptodev_sym_session *sess)
 {
 	struct dpaa_sec_dev_private *qi = dev->data->dev_private;
-	uint8_t index = dev->driver_id;
+	uint8_t index = dev->driver_id, i;
 	void *sess_priv = get_sym_session_private_data(sess, index);
 
 	PMD_INIT_FUNC_TRACE();
@@ -2125,9 +2125,12 @@ dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
 	if (sess_priv) {
 		struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
 
-		if (s->inq[rte_lcore_id() % MAX_DPAA_CORES])
-			dpaa_sec_detach_rxq(qi,
-				s->inq[rte_lcore_id() % MAX_DPAA_CORES]);
+		for (i = 0; i < MAX_DPAA_CORES; i++) {
+			if (s->inq[i])
+				dpaa_sec_detach_rxq(qi, s->inq[i]);
+			s->inq[i] = NULL;
+			s->qp[i] = NULL;
+		}
 		rte_free(s->cipher_key.data);
 		rte_free(s->auth_key.data);
 		memset(s, 0, sizeof(dpaa_sec_session));
-- 
2.17.1

[dpdk-dev] [PATCH 6/6] crypto/dpaa2_sec: support multi process

[Akhil Goyal]

- fle pool allocations should be done for each process.
- cryptodev->data is shared across muliple processes but
cryptodev itself is allocated for each process. So any
information which needs to be shared between processes,
should be kept in cryptodev->data.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h     |  2 +-
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 26 ++++++++++-----------
 2 files changed, 13 insertions(+), 15 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 4679e9340..0cbde8a9b 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -152,7 +152,7 @@ struct dpaa2_queue {
 	struct rte_mempool *mb_pool; /**< mbuf pool to populate RX ring. */
 	union {
 		struct rte_eth_dev_data *eth_data;
-		void *dev;
+		struct rte_cryptodev_data *crypto_data;
 	};
 	int32_t eventfd;	/*!< Event Fd of this queue */
 	uint32_t fqid;		/*!< Unique ID of this queue */
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 31b7de679..5b72b9ee4 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -7,6 +7,7 @@
 
 #include <time.h>
 #include <net/if.h>
+#include <unistd.h>
 
 #include <rte_mbuf.h>
 #include <rte_cryptodev.h>
@@ -1297,7 +1298,7 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 }
 
 static inline struct rte_crypto_op *
-sec_simple_fd_to_mbuf(const struct qbman_fd *fd, __rte_unused uint8_t id)
+sec_simple_fd_to_mbuf(const struct qbman_fd *fd)
 {
 	struct rte_crypto_op *op;
 	uint16_t len = DPAA2_GET_FD_LEN(fd);
@@ -1326,7 +1327,7 @@ sec_simple_fd_to_mbuf(const struct qbman_fd *fd, __rte_unused uint8_t id)
 }
 
 static inline struct rte_crypto_op *
-sec_fd_to_mbuf(const struct qbman_fd *fd, uint8_t driver_id)
+sec_fd_to_mbuf(const struct qbman_fd *fd)
 {
 	struct qbman_fle *fle;
 	struct rte_crypto_op *op;
@@ -1334,7 +1335,7 @@ sec_fd_to_mbuf(const struct qbman_fd *fd, uint8_t driver_id)
 	struct rte_mbuf *dst, *src;
 
 	if (DPAA2_FD_GET_FORMAT(fd) == qbman_fd_single)
-		return sec_simple_fd_to_mbuf(fd, driver_id);
+		return sec_simple_fd_to_mbuf(fd);
 
 	fle = (struct qbman_fle *)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
 
@@ -1401,8 +1402,6 @@ dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
 {
 	/* Function is responsible to receive frames for a given device and VQ*/
 	struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
-	struct rte_cryptodev *dev =
-			(struct rte_cryptodev *)(dpaa2_qp->rx_vq.dev);
 	struct qbman_result *dq_storage;
 	uint32_t fqid = dpaa2_qp->rx_vq.fqid;
 	int ret, num_rx = 0;
@@ -1472,7 +1471,7 @@ dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
 		}
 
 		fd = qbman_result_DQ_fd(dq_storage);
-		ops[num_rx] = sec_fd_to_mbuf(fd, dev->driver_id);
+		ops[num_rx] = sec_fd_to_mbuf(fd);
 
 		if (unlikely(fd->simple.frc)) {
 			/* TODO Parse SEC errors */
@@ -1546,8 +1545,8 @@ dpaa2_sec_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 		return -1;
 	}
 
-	qp->rx_vq.dev = dev;
-	qp->tx_vq.dev = dev;
+	qp->rx_vq.crypto_data = dev->data;
+	qp->tx_vq.crypto_data = dev->data;
 	qp->rx_vq.q_storage = rte_malloc("sec dq storage",
 		sizeof(struct queue_storage_info_t),
 		RTE_CACHE_LINE_SIZE);
@@ -3116,8 +3115,7 @@ dpaa2_sec_process_parallel_event(struct qbman_swp *swp,
 	ev->sched_type = rxq->ev.sched_type;
 	ev->queue_id = rxq->ev.queue_id;
 	ev->priority = rxq->ev.priority;
-	ev->event_ptr = sec_fd_to_mbuf(fd, ((struct rte_cryptodev *)
-				(rxq->dev))->driver_id);
+	ev->event_ptr = sec_fd_to_mbuf(fd);
 
 	qbman_swp_dqrr_consume(swp, dq);
 }
@@ -3145,8 +3143,7 @@ dpaa2_sec_process_atomic_event(struct qbman_swp *swp __attribute__((unused)),
 	ev->queue_id = rxq->ev.queue_id;
 	ev->priority = rxq->ev.priority;
 
-	ev->event_ptr = sec_fd_to_mbuf(fd, ((struct rte_cryptodev *)
-				(rxq->dev))->driver_id);
+	ev->event_ptr = sec_fd_to_mbuf(fd);
 	dqrr_index = qbman_get_dqrr_idx(dq);
 	crypto_op->sym->m_src->seqn = dqrr_index + 1;
 	DPAA2_PER_LCORE_DQRR_SIZE++;
@@ -3275,7 +3272,7 @@ dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)
 	uint16_t token;
 	struct dpseci_attr attr;
 	int retcode, hw_id;
-	char str[20];
+	char str[30];
 
 	PMD_INIT_FUNC_TRACE();
 	dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
@@ -3353,7 +3350,8 @@ dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)
 	internals->hw = dpseci;
 	internals->token = token;
 
-	snprintf(str, sizeof(str), "fle_pool_%d", cryptodev->data->dev_id);
+	snprintf(str, sizeof(str), "sec_fle_pool_p%d_%d",
+			getpid(), cryptodev->data->dev_id);
 	internals->fle_pool = rte_mempool_create((const char *)str,
 			FLE_POOL_NUM_BUFS,
 			FLE_POOL_BUF_SIZE,
-- 
2.17.1

[dpdk-dev] [PATCH 6/6] crypto/dpaa2_sec: support multi process

[Akhil Goyal]

- fle pool allocations should be done for each process.
- cryptodev->data is shared across muliple processes but
cryptodev itself is allocated for each process. So any
information which needs to be shared between processes,
should be kept in cryptodev->data.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h     |  2 +-
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 26 ++++++++++-----------
 2 files changed, 13 insertions(+), 15 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 4679e9340..0cbde8a9b 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -152,7 +152,7 @@ struct dpaa2_queue {
 	struct rte_mempool *mb_pool; /**< mbuf pool to populate RX ring. */
 	union {
 		struct rte_eth_dev_data *eth_data;
-		void *dev;
+		struct rte_cryptodev_data *crypto_data;
 	};
 	int32_t eventfd;	/*!< Event Fd of this queue */
 	uint32_t fqid;		/*!< Unique ID of this queue */
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 31b7de679..5b72b9ee4 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -7,6 +7,7 @@
 
 #include <time.h>
 #include <net/if.h>
+#include <unistd.h>
 
 #include <rte_mbuf.h>
 #include <rte_cryptodev.h>
@@ -1297,7 +1298,7 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 }
 
 static inline struct rte_crypto_op *
-sec_simple_fd_to_mbuf(const struct qbman_fd *fd, __rte_unused uint8_t id)
+sec_simple_fd_to_mbuf(const struct qbman_fd *fd)
 {
 	struct rte_crypto_op *op;
 	uint16_t len = DPAA2_GET_FD_LEN(fd);
@@ -1326,7 +1327,7 @@ sec_simple_fd_to_mbuf(const struct qbman_fd *fd, __rte_unused uint8_t id)
 }
 
 static inline struct rte_crypto_op *
-sec_fd_to_mbuf(const struct qbman_fd *fd, uint8_t driver_id)
+sec_fd_to_mbuf(const struct qbman_fd *fd)
 {
 	struct qbman_fle *fle;
 	struct rte_crypto_op *op;
@@ -1334,7 +1335,7 @@ sec_fd_to_mbuf(const struct qbman_fd *fd, uint8_t driver_id)
 	struct rte_mbuf *dst, *src;
 
 	if (DPAA2_FD_GET_FORMAT(fd) == qbman_fd_single)
-		return sec_simple_fd_to_mbuf(fd, driver_id);
+		return sec_simple_fd_to_mbuf(fd);
 
 	fle = (struct qbman_fle *)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
 
@@ -1401,8 +1402,6 @@ dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
 {
 	/* Function is responsible to receive frames for a given device and VQ*/
 	struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
-	struct rte_cryptodev *dev =
-			(struct rte_cryptodev *)(dpaa2_qp->rx_vq.dev);
 	struct qbman_result *dq_storage;
 	uint32_t fqid = dpaa2_qp->rx_vq.fqid;
 	int ret, num_rx = 0;
@@ -1472,7 +1471,7 @@ dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
 		}
 
 		fd = qbman_result_DQ_fd(dq_storage);
-		ops[num_rx] = sec_fd_to_mbuf(fd, dev->driver_id);
+		ops[num_rx] = sec_fd_to_mbuf(fd);
 
 		if (unlikely(fd->simple.frc)) {
 			/* TODO Parse SEC errors */
@@ -1546,8 +1545,8 @@ dpaa2_sec_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 		return -1;
 	}
 
-	qp->rx_vq.dev = dev;
-	qp->tx_vq.dev = dev;
+	qp->rx_vq.crypto_data = dev->data;
+	qp->tx_vq.crypto_data = dev->data;
 	qp->rx_vq.q_storage = rte_malloc("sec dq storage",
 		sizeof(struct queue_storage_info_t),
 		RTE_CACHE_LINE_SIZE);
@@ -3116,8 +3115,7 @@ dpaa2_sec_process_parallel_event(struct qbman_swp *swp,
 	ev->sched_type = rxq->ev.sched_type;
 	ev->queue_id = rxq->ev.queue_id;
 	ev->priority = rxq->ev.priority;
-	ev->event_ptr = sec_fd_to_mbuf(fd, ((struct rte_cryptodev *)
-				(rxq->dev))->driver_id);
+	ev->event_ptr = sec_fd_to_mbuf(fd);
 
 	qbman_swp_dqrr_consume(swp, dq);
 }
@@ -3145,8 +3143,7 @@ dpaa2_sec_process_atomic_event(struct qbman_swp *swp __attribute__((unused)),
 	ev->queue_id = rxq->ev.queue_id;
 	ev->priority = rxq->ev.priority;
 
-	ev->event_ptr = sec_fd_to_mbuf(fd, ((struct rte_cryptodev *)
-				(rxq->dev))->driver_id);
+	ev->event_ptr = sec_fd_to_mbuf(fd);
 	dqrr_index = qbman_get_dqrr_idx(dq);
 	crypto_op->sym->m_src->seqn = dqrr_index + 1;
 	DPAA2_PER_LCORE_DQRR_SIZE++;
@@ -3275,7 +3272,7 @@ dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)
 	uint16_t token;
 	struct dpseci_attr attr;
 	int retcode, hw_id;
-	char str[20];
+	char str[30];
 
 	PMD_INIT_FUNC_TRACE();
 	dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
@@ -3353,7 +3350,8 @@ dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)
 	internals->hw = dpseci;
 	internals->token = token;
 
-	snprintf(str, sizeof(str), "fle_pool_%d", cryptodev->data->dev_id);
+	snprintf(str, sizeof(str), "sec_fle_pool_p%d_%d",
+			getpid(), cryptodev->data->dev_id);
 	internals->fle_pool = rte_mempool_create((const char *)str,
 			FLE_POOL_NUM_BUFS,
 			FLE_POOL_BUF_SIZE,
-- 
2.17.1

Re: [dpdk-dev] [PATCH 0/6] minor fixes and updates for NXP crypto PMDs

[Akhil Goyal]

On 3/27/2019 5:23 PM, Akhil Goyal wrote:
> dpaa2_sec and dpaa_sec are updated with some fixes
> for cleanup and some performance optimizations.
>
> The last patch is to make the dpaa2_sec PMD multi-process safe.
>
> Akhil Goyal (6):
>    crypto/dpaa2_sec: fix session clear
>    crypto/dpaa2_sec: fix offset calculation for gcm
>    drivers/crypto: update inline desc for sharing mode
>    crypto/dpaa2_sec: remove unnecessary flc configurations
>    crypto/dpaa_sec: fix session qp attach/detach
>    crypto/dpaa2_sec: support multi process
>
>   drivers/bus/fslmc/portal/dpaa2_hw_pvt.h     |  2 +-
>   drivers/crypto/caam_jr/caam_jr.c            | 13 ++--
>   drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 74 +++++++--------------
>   drivers/crypto/dpaa2_sec/hw/desc/algo.h     | 18 +++--
>   drivers/crypto/dpaa2_sec/hw/desc/ipsec.h    | 10 +--
>   drivers/crypto/dpaa_sec/dpaa_sec.c          | 27 ++++----
>   6 files changed, 65 insertions(+), 79 deletions(-)
>
Applied to dpdk-next-crypto

Re: [dpdk-dev] [PATCH 0/6] minor fixes and updates for NXP crypto PMDs

[Akhil Goyal]

On 3/27/2019 5:23 PM, Akhil Goyal wrote:
> dpaa2_sec and dpaa_sec are updated with some fixes
> for cleanup and some performance optimizations.
>
> The last patch is to make the dpaa2_sec PMD multi-process safe.
>
> Akhil Goyal (6):
>    crypto/dpaa2_sec: fix session clear
>    crypto/dpaa2_sec: fix offset calculation for gcm
>    drivers/crypto: update inline desc for sharing mode
>    crypto/dpaa2_sec: remove unnecessary flc configurations
>    crypto/dpaa_sec: fix session qp attach/detach
>    crypto/dpaa2_sec: support multi process
>
>   drivers/bus/fslmc/portal/dpaa2_hw_pvt.h     |  2 +-
>   drivers/crypto/caam_jr/caam_jr.c            | 13 ++--
>   drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 74 +++++++--------------
>   drivers/crypto/dpaa2_sec/hw/desc/algo.h     | 18 +++--
>   drivers/crypto/dpaa2_sec/hw/desc/ipsec.h    | 10 +--
>   drivers/crypto/dpaa_sec/dpaa_sec.c          | 27 ++++----
>   6 files changed, 65 insertions(+), 79 deletions(-)
>
Applied to dpdk-next-crypto

Re: [dpdk-dev] [PATCH 5/6] crypto/dpaa_sec: fix session qp attach/detach

[Kevin Traynor]

On 27/03/2019 11:53, Akhil Goyal wrote:
> session inq and qp are assigned for each core from which the
> packets arrive. This was not correctly handled while supporting
> multiple sessions per queue pair.
> This patch fixes the attach and detach of queues for each core.
> 
> Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per queue pair")
> Cc: stable@dpdk.org

Hi, this will not backport to 18.11 branch as:
4e694fe51171dcdbe94019189a0240833b45c943
Author: Akhil Goyal <akhil.goyal@nxp.com>
Date:   Wed Jan 9 15:14:17 2019 +0000

    crypto/dpaa_sec: support same session flows on multi-cores

was added after 18.11 and dpaa_sec_sym_session_clear() is quite
different. Please send a backport of the bugfix for 18.11 branch, or let
me know if it's not needed.

thanks,
Kevin.

> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
> ---
>  drivers/crypto/dpaa_sec/dpaa_sec.c | 17 ++++++++++-------
>  1 file changed, 10 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
> index cb99be4e1..8305f19a3 100644
> --- a/drivers/crypto/dpaa_sec/dpaa_sec.c
> +++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
> @@ -1,7 +1,7 @@
>  /* SPDX-License-Identifier: BSD-3-Clause
>   *
>   *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
> - *   Copyright 2017-2018 NXP
> + *   Copyright 2017-2019 NXP
>   *
>   */
>  
> @@ -1940,13 +1940,13 @@ dpaa_sec_attach_rxq(struct dpaa_sec_dev_private *qi)
>  {
>  	unsigned int i;
>  
> -	for (i = 0; i < qi->max_nb_sessions; i++) {
> +	for (i = 0; i < qi->max_nb_sessions * MAX_DPAA_CORES; i++) {
>  		if (qi->inq_attach[i] == 0) {
>  			qi->inq_attach[i] = 1;
>  			return &qi->inq[i];
>  		}
>  	}
> -	DPAA_SEC_WARN("All ses session in use %x", qi->max_nb_sessions);
> +	DPAA_SEC_WARN("All session in use %u", qi->max_nb_sessions);
>  
>  	return NULL;
>  }
> @@ -2115,7 +2115,7 @@ dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
>  		struct rte_cryptodev_sym_session *sess)
>  {
>  	struct dpaa_sec_dev_private *qi = dev->data->dev_private;
> -	uint8_t index = dev->driver_id;
> +	uint8_t index = dev->driver_id, i;
>  	void *sess_priv = get_sym_session_private_data(sess, index);
>  
>  	PMD_INIT_FUNC_TRACE();
> @@ -2125,9 +2125,12 @@ dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
>  	if (sess_priv) {
>  		struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
>  
> -		if (s->inq[rte_lcore_id() % MAX_DPAA_CORES])
> -			dpaa_sec_detach_rxq(qi,
> -				s->inq[rte_lcore_id() % MAX_DPAA_CORES]);
> +		for (i = 0; i < MAX_DPAA_CORES; i++) {
> +			if (s->inq[i])
> +				dpaa_sec_detach_rxq(qi, s->inq[i]);
> +			s->inq[i] = NULL;
> +			s->qp[i] = NULL;
> +		}
>  		rte_free(s->cipher_key.data);
>  		rte_free(s->auth_key.data);
>  		memset(s, 0, sizeof(dpaa_sec_session));
> 

Re: [dpdk-dev] [PATCH 5/6] crypto/dpaa_sec: fix session qp attach/detach

[Kevin Traynor]

On 27/03/2019 11:53, Akhil Goyal wrote:
> session inq and qp are assigned for each core from which the
> packets arrive. This was not correctly handled while supporting
> multiple sessions per queue pair.
> This patch fixes the attach and detach of queues for each core.
> 
> Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per queue pair")
> Cc: stable@dpdk.org

Hi, this will not backport to 18.11 branch as:
4e694fe51171dcdbe94019189a0240833b45c943
Author: Akhil Goyal <akhil.goyal@nxp.com>
Date:   Wed Jan 9 15:14:17 2019 +0000

    crypto/dpaa_sec: support same session flows on multi-cores

was added after 18.11 and dpaa_sec_sym_session_clear() is quite
different. Please send a backport of the bugfix for 18.11 branch, or let
me know if it's not needed.

thanks,
Kevin.

> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
> ---
>  drivers/crypto/dpaa_sec/dpaa_sec.c | 17 ++++++++++-------
>  1 file changed, 10 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
> index cb99be4e1..8305f19a3 100644
> --- a/drivers/crypto/dpaa_sec/dpaa_sec.c
> +++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
> @@ -1,7 +1,7 @@
>  /* SPDX-License-Identifier: BSD-3-Clause
>   *
>   *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
> - *   Copyright 2017-2018 NXP
> + *   Copyright 2017-2019 NXP
>   *
>   */
>  
> @@ -1940,13 +1940,13 @@ dpaa_sec_attach_rxq(struct dpaa_sec_dev_private *qi)
>  {
>  	unsigned int i;
>  
> -	for (i = 0; i < qi->max_nb_sessions; i++) {
> +	for (i = 0; i < qi->max_nb_sessions * MAX_DPAA_CORES; i++) {
>  		if (qi->inq_attach[i] == 0) {
>  			qi->inq_attach[i] = 1;
>  			return &qi->inq[i];
>  		}
>  	}
> -	DPAA_SEC_WARN("All ses session in use %x", qi->max_nb_sessions);
> +	DPAA_SEC_WARN("All session in use %u", qi->max_nb_sessions);
>  
>  	return NULL;
>  }
> @@ -2115,7 +2115,7 @@ dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
>  		struct rte_cryptodev_sym_session *sess)
>  {
>  	struct dpaa_sec_dev_private *qi = dev->data->dev_private;
> -	uint8_t index = dev->driver_id;
> +	uint8_t index = dev->driver_id, i;
>  	void *sess_priv = get_sym_session_private_data(sess, index);
>  
>  	PMD_INIT_FUNC_TRACE();
> @@ -2125,9 +2125,12 @@ dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
>  	if (sess_priv) {
>  		struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
>  
> -		if (s->inq[rte_lcore_id() % MAX_DPAA_CORES])
> -			dpaa_sec_detach_rxq(qi,
> -				s->inq[rte_lcore_id() % MAX_DPAA_CORES]);
> +		for (i = 0; i < MAX_DPAA_CORES; i++) {
> +			if (s->inq[i])
> +				dpaa_sec_detach_rxq(qi, s->inq[i]);
> +			s->inq[i] = NULL;
> +			s->qp[i] = NULL;
> +		}
>  		rte_free(s->cipher_key.data);
>  		rte_free(s->auth_key.data);
>  		memset(s, 0, sizeof(dpaa_sec_session));
> 

Re: [dpdk-dev] [PATCH 5/6] crypto/dpaa_sec: fix session qp attach/detach

[Kevin Traynor]

On 25/04/2019 17:24, Kevin Traynor wrote:
> On 27/03/2019 11:53, Akhil Goyal wrote:
>> session inq and qp are assigned for each core from which the
>> packets arrive. This was not correctly handled while supporting
>> multiple sessions per queue pair.
>> This patch fixes the attach and detach of queues for each core.
>>
>> Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per queue pair")
>> Cc: stable@dpdk.org
> 
> Hi, this will not backport to 18.11 branch as:
> 4e694fe51171dcdbe94019189a0240833b45c943
> Author: Akhil Goyal <akhil.goyal@nxp.com>
> Date:   Wed Jan 9 15:14:17 2019 +0000
> 
>     crypto/dpaa_sec: support same session flows on multi-cores
> 
> was added after 18.11 and dpaa_sec_sym_session_clear() is quite
> different. Please send a backport of the bugfix for 18.11 branch, or let
> me know if it's not needed.
> 
> thanks,
> Kevin.
> 
>> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
>> ---
>>  drivers/crypto/dpaa_sec/dpaa_sec.c | 17 ++++++++++-------
>>  1 file changed, 10 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
>> index cb99be4e1..8305f19a3 100644
>> --- a/drivers/crypto/dpaa_sec/dpaa_sec.c
>> +++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
>> @@ -1,7 +1,7 @@
>>  /* SPDX-License-Identifier: BSD-3-Clause
>>   *
>>   *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
>> - *   Copyright 2017-2018 NXP
>> + *   Copyright 2017-2019 NXP
>>   *
>>   */
>>  
>> @@ -1940,13 +1940,13 @@ dpaa_sec_attach_rxq(struct dpaa_sec_dev_private *qi)
>>  {
>>  	unsigned int i;
>>  
>> -	for (i = 0; i < qi->max_nb_sessions; i++) {
>> +	for (i = 0; i < qi->max_nb_sessions * MAX_DPAA_CORES; i++) {
>>  		if (qi->inq_attach[i] == 0) {

Btw, without knowing the crypto code, the use of max_nb_sessions in for
loops with fixed size arrays being indexed looks suspect to me. In the
snippet above

unsigned char inq_attach[RTE_DPAA_MAX_RX_QUEUE];
which means inq_attach[4096]

At least in one place I can see
.max_nb_sessions = MRVL_PMD_DEFAULT_MAX_NB_SESSIONS
which makes max_nb_sessions=2048, while MAX_DPAA_CORES=4

>>  			qi->inq_attach[i] = 1;
>>  			return &qi->inq[i];
>>  		}
>>  	}
>> -	DPAA_SEC_WARN("All ses session in use %x", qi->max_nb_sessions);
>> +	DPAA_SEC_WARN("All session in use %u", qi->max_nb_sessions);
>>  
>>  	return NULL;
>>  }
>> @@ -2115,7 +2115,7 @@ dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
>>  		struct rte_cryptodev_sym_session *sess)
>>  {
>>  	struct dpaa_sec_dev_private *qi = dev->data->dev_private;
>> -	uint8_t index = dev->driver_id;
>> +	uint8_t index = dev->driver_id, i;
>>  	void *sess_priv = get_sym_session_private_data(sess, index);
>>  
>>  	PMD_INIT_FUNC_TRACE();
>> @@ -2125,9 +2125,12 @@ dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
>>  	if (sess_priv) {
>>  		struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
>>  
>> -		if (s->inq[rte_lcore_id() % MAX_DPAA_CORES])
>> -			dpaa_sec_detach_rxq(qi,
>> -				s->inq[rte_lcore_id() % MAX_DPAA_CORES]);
>> +		for (i = 0; i < MAX_DPAA_CORES; i++) {
>> +			if (s->inq[i])
>> +				dpaa_sec_detach_rxq(qi, s->inq[i]);
>> +			s->inq[i] = NULL;
>> +			s->qp[i] = NULL;
>> +		}
>>  		rte_free(s->cipher_key.data);
>>  		rte_free(s->auth_key.data);
>>  		memset(s, 0, sizeof(dpaa_sec_session));
>>
> 

Re: [dpdk-dev] [PATCH 5/6] crypto/dpaa_sec: fix session qp attach/detach

[Kevin Traynor]

On 25/04/2019 17:24, Kevin Traynor wrote:
> On 27/03/2019 11:53, Akhil Goyal wrote:
>> session inq and qp are assigned for each core from which the
>> packets arrive. This was not correctly handled while supporting
>> multiple sessions per queue pair.
>> This patch fixes the attach and detach of queues for each core.
>>
>> Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per queue pair")
>> Cc: stable@dpdk.org
> 
> Hi, this will not backport to 18.11 branch as:
> 4e694fe51171dcdbe94019189a0240833b45c943
> Author: Akhil Goyal <akhil.goyal@nxp.com>
> Date:   Wed Jan 9 15:14:17 2019 +0000
> 
>     crypto/dpaa_sec: support same session flows on multi-cores
> 
> was added after 18.11 and dpaa_sec_sym_session_clear() is quite
> different. Please send a backport of the bugfix for 18.11 branch, or let
> me know if it's not needed.
> 
> thanks,
> Kevin.
> 
>> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
>> ---
>>  drivers/crypto/dpaa_sec/dpaa_sec.c | 17 ++++++++++-------
>>  1 file changed, 10 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
>> index cb99be4e1..8305f19a3 100644
>> --- a/drivers/crypto/dpaa_sec/dpaa_sec.c
>> +++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
>> @@ -1,7 +1,7 @@
>>  /* SPDX-License-Identifier: BSD-3-Clause
>>   *
>>   *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
>> - *   Copyright 2017-2018 NXP
>> + *   Copyright 2017-2019 NXP
>>   *
>>   */
>>  
>> @@ -1940,13 +1940,13 @@ dpaa_sec_attach_rxq(struct dpaa_sec_dev_private *qi)
>>  {
>>  	unsigned int i;
>>  
>> -	for (i = 0; i < qi->max_nb_sessions; i++) {
>> +	for (i = 0; i < qi->max_nb_sessions * MAX_DPAA_CORES; i++) {
>>  		if (qi->inq_attach[i] == 0) {

Btw, without knowing the crypto code, the use of max_nb_sessions in for
loops with fixed size arrays being indexed looks suspect to me. In the
snippet above

unsigned char inq_attach[RTE_DPAA_MAX_RX_QUEUE];
which means inq_attach[4096]

At least in one place I can see
.max_nb_sessions = MRVL_PMD_DEFAULT_MAX_NB_SESSIONS
which makes max_nb_sessions=2048, while MAX_DPAA_CORES=4

>>  			qi->inq_attach[i] = 1;
>>  			return &qi->inq[i];
>>  		}
>>  	}
>> -	DPAA_SEC_WARN("All ses session in use %x", qi->max_nb_sessions);
>> +	DPAA_SEC_WARN("All session in use %u", qi->max_nb_sessions);
>>  
>>  	return NULL;
>>  }
>> @@ -2115,7 +2115,7 @@ dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
>>  		struct rte_cryptodev_sym_session *sess)
>>  {
>>  	struct dpaa_sec_dev_private *qi = dev->data->dev_private;
>> -	uint8_t index = dev->driver_id;
>> +	uint8_t index = dev->driver_id, i;
>>  	void *sess_priv = get_sym_session_private_data(sess, index);
>>  
>>  	PMD_INIT_FUNC_TRACE();
>> @@ -2125,9 +2125,12 @@ dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
>>  	if (sess_priv) {
>>  		struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
>>  
>> -		if (s->inq[rte_lcore_id() % MAX_DPAA_CORES])
>> -			dpaa_sec_detach_rxq(qi,
>> -				s->inq[rte_lcore_id() % MAX_DPAA_CORES]);
>> +		for (i = 0; i < MAX_DPAA_CORES; i++) {
>> +			if (s->inq[i])
>> +				dpaa_sec_detach_rxq(qi, s->inq[i]);
>> +			s->inq[i] = NULL;
>> +			s->qp[i] = NULL;
>> +		}
>>  		rte_free(s->cipher_key.data);
>>  		rte_free(s->auth_key.data);
>>  		memset(s, 0, sizeof(dpaa_sec_session));
>>
> 

Re: [dpdk-dev] [EXT] Re: [PATCH 5/6] crypto/dpaa_sec: fix session qp attach/detach

[Hemant Agrawal]

Hi Kevin,
	Thanks we will look into it. 
Regards,
Hemant
> -----Original Message-----
> From: Kevin Traynor <ktraynor@redhat.com>
> Sent: Thursday, April 25, 2019 11:13 PM
> To: Akhil Goyal <akhil.goyal@nxp.com>; dev@dpdk.org
> Cc: Hemant Agrawal <hemant.agrawal@nxp.com>; stable@dpdk.org
> Subject: [EXT] Re: [dpdk-dev] [PATCH 5/6] crypto/dpaa_sec: fix session qp
> attach/detach
> Importance: High
> 
> Caution: EXT Email
> 
> On 25/04/2019 17:24, Kevin Traynor wrote:
> > On 27/03/2019 11:53, Akhil Goyal wrote:
> >> session inq and qp are assigned for each core from which the packets
> >> arrive. This was not correctly handled while supporting multiple
> >> sessions per queue pair.
> >> This patch fixes the attach and detach of queues for each core.
> >>
> >> Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per
> >> queue pair")
> >> Cc: stable@dpdk.org
> >
> > Hi, this will not backport to 18.11 branch as:
> > 4e694fe51171dcdbe94019189a0240833b45c943
> > Author: Akhil Goyal <akhil.goyal@nxp.com>
> > Date:   Wed Jan 9 15:14:17 2019 +0000
> >
> >     crypto/dpaa_sec: support same session flows on multi-cores
> >
> > was added after 18.11 and dpaa_sec_sym_session_clear() is quite
> > different. Please send a backport of the bugfix for 18.11 branch, or
> > let me know if it's not needed.
> >
> > thanks,
> > Kevin.
> >
> >> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
> >> ---
> >>  drivers/crypto/dpaa_sec/dpaa_sec.c | 17 ++++++++++-------
> >>  1 file changed, 10 insertions(+), 7 deletions(-)
> >>
> >> diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c
> >> b/drivers/crypto/dpaa_sec/dpaa_sec.c
> >> index cb99be4e1..8305f19a3 100644
> >> --- a/drivers/crypto/dpaa_sec/dpaa_sec.c
> >> +++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
> >> @@ -1,7 +1,7 @@
> >>  /* SPDX-License-Identifier: BSD-3-Clause
> >>   *
> >>   *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
> >> - *   Copyright 2017-2018 NXP
> >> + *   Copyright 2017-2019 NXP
> >>   *
> >>   */
> >>
> >> @@ -1940,13 +1940,13 @@ dpaa_sec_attach_rxq(struct
> >> dpaa_sec_dev_private *qi)  {
> >>      unsigned int i;
> >>
> >> -    for (i = 0; i < qi->max_nb_sessions; i++) {
> >> +    for (i = 0; i < qi->max_nb_sessions * MAX_DPAA_CORES; i++) {
> >>              if (qi->inq_attach[i] == 0) {
> 
> Btw, without knowing the crypto code, the use of max_nb_sessions in for
> loops with fixed size arrays being indexed looks suspect to me. In the snippet
> above
> 
> unsigned char inq_attach[RTE_DPAA_MAX_RX_QUEUE];
> which means inq_attach[4096]
> 
> At least in one place I can see
> .max_nb_sessions = MRVL_PMD_DEFAULT_MAX_NB_SESSIONS which
> makes max_nb_sessions=2048, while MAX_DPAA_CORES=4
> 
> >>                      qi->inq_attach[i] = 1;
> >>                      return &qi->inq[i];
> >>              }
> >>      }
> >> -    DPAA_SEC_WARN("All ses session in use %x", qi->max_nb_sessions);
> >> +    DPAA_SEC_WARN("All session in use %u", qi->max_nb_sessions);
> >>
> >>      return NULL;
> >>  }
> >> @@ -2115,7 +2115,7 @@ dpaa_sec_sym_session_clear(struct
> rte_cryptodev *dev,
> >>              struct rte_cryptodev_sym_session *sess)  {
> >>      struct dpaa_sec_dev_private *qi = dev->data->dev_private;
> >> -    uint8_t index = dev->driver_id;
> >> +    uint8_t index = dev->driver_id, i;
> >>      void *sess_priv = get_sym_session_private_data(sess, index);
> >>
> >>      PMD_INIT_FUNC_TRACE();
> >> @@ -2125,9 +2125,12 @@ dpaa_sec_sym_session_clear(struct
> rte_cryptodev *dev,
> >>      if (sess_priv) {
> >>              struct rte_mempool *sess_mp =
> >> rte_mempool_from_obj(sess_priv);
> >>
> >> -            if (s->inq[rte_lcore_id() % MAX_DPAA_CORES])
> >> -                    dpaa_sec_detach_rxq(qi,
> >> -                            s->inq[rte_lcore_id() % MAX_DPAA_CORES]);
> >> +            for (i = 0; i < MAX_DPAA_CORES; i++) {
> >> +                    if (s->inq[i])
> >> +                            dpaa_sec_detach_rxq(qi, s->inq[i]);
> >> +                    s->inq[i] = NULL;
> >> +                    s->qp[i] = NULL;
> >> +            }
> >>              rte_free(s->cipher_key.data);
> >>              rte_free(s->auth_key.data);
> >>              memset(s, 0, sizeof(dpaa_sec_session));
> >>
> >

Re: [dpdk-dev] [EXT] Re: [PATCH 5/6] crypto/dpaa_sec: fix session qp attach/detach

[Hemant Agrawal]

Hi Kevin,
	Thanks we will look into it. 
Regards,
Hemant
> -----Original Message-----
> From: Kevin Traynor <ktraynor@redhat.com>
> Sent: Thursday, April 25, 2019 11:13 PM
> To: Akhil Goyal <akhil.goyal@nxp.com>; dev@dpdk.org
> Cc: Hemant Agrawal <hemant.agrawal@nxp.com>; stable@dpdk.org
> Subject: [EXT] Re: [dpdk-dev] [PATCH 5/6] crypto/dpaa_sec: fix session qp
> attach/detach
> Importance: High
> 
> Caution: EXT Email
> 
> On 25/04/2019 17:24, Kevin Traynor wrote:
> > On 27/03/2019 11:53, Akhil Goyal wrote:
> >> session inq and qp are assigned for each core from which the packets
> >> arrive. This was not correctly handled while supporting multiple
> >> sessions per queue pair.
> >> This patch fixes the attach and detach of queues for each core.
> >>
> >> Fixes: e79416d10fa3 ("crypto/dpaa_sec: support multiple sessions per
> >> queue pair")
> >> Cc: stable@dpdk.org
> >
> > Hi, this will not backport to 18.11 branch as:
> > 4e694fe51171dcdbe94019189a0240833b45c943
> > Author: Akhil Goyal <akhil.goyal@nxp.com>
> > Date:   Wed Jan 9 15:14:17 2019 +0000
> >
> >     crypto/dpaa_sec: support same session flows on multi-cores
> >
> > was added after 18.11 and dpaa_sec_sym_session_clear() is quite
> > different. Please send a backport of the bugfix for 18.11 branch, or
> > let me know if it's not needed.
> >
> > thanks,
> > Kevin.
> >
> >> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
> >> ---
> >>  drivers/crypto/dpaa_sec/dpaa_sec.c | 17 ++++++++++-------
> >>  1 file changed, 10 insertions(+), 7 deletions(-)
> >>
> >> diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c
> >> b/drivers/crypto/dpaa_sec/dpaa_sec.c
> >> index cb99be4e1..8305f19a3 100644
> >> --- a/drivers/crypto/dpaa_sec/dpaa_sec.c
> >> +++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
> >> @@ -1,7 +1,7 @@
> >>  /* SPDX-License-Identifier: BSD-3-Clause
> >>   *
> >>   *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
> >> - *   Copyright 2017-2018 NXP
> >> + *   Copyright 2017-2019 NXP
> >>   *
> >>   */
> >>
> >> @@ -1940,13 +1940,13 @@ dpaa_sec_attach_rxq(struct
> >> dpaa_sec_dev_private *qi)  {
> >>      unsigned int i;
> >>
> >> -    for (i = 0; i < qi->max_nb_sessions; i++) {
> >> +    for (i = 0; i < qi->max_nb_sessions * MAX_DPAA_CORES; i++) {
> >>              if (qi->inq_attach[i] == 0) {
> 
> Btw, without knowing the crypto code, the use of max_nb_sessions in for
> loops with fixed size arrays being indexed looks suspect to me. In the snippet
> above
> 
> unsigned char inq_attach[RTE_DPAA_MAX_RX_QUEUE];
> which means inq_attach[4096]
> 
> At least in one place I can see
> .max_nb_sessions = MRVL_PMD_DEFAULT_MAX_NB_SESSIONS which
> makes max_nb_sessions=2048, while MAX_DPAA_CORES=4
> 
> >>                      qi->inq_attach[i] = 1;
> >>                      return &qi->inq[i];
> >>              }
> >>      }
> >> -    DPAA_SEC_WARN("All ses session in use %x", qi->max_nb_sessions);
> >> +    DPAA_SEC_WARN("All session in use %u", qi->max_nb_sessions);
> >>
> >>      return NULL;
> >>  }
> >> @@ -2115,7 +2115,7 @@ dpaa_sec_sym_session_clear(struct
> rte_cryptodev *dev,
> >>              struct rte_cryptodev_sym_session *sess)  {
> >>      struct dpaa_sec_dev_private *qi = dev->data->dev_private;
> >> -    uint8_t index = dev->driver_id;
> >> +    uint8_t index = dev->driver_id, i;
> >>      void *sess_priv = get_sym_session_private_data(sess, index);
> >>
> >>      PMD_INIT_FUNC_TRACE();
> >> @@ -2125,9 +2125,12 @@ dpaa_sec_sym_session_clear(struct
> rte_cryptodev *dev,
> >>      if (sess_priv) {
> >>              struct rte_mempool *sess_mp =
> >> rte_mempool_from_obj(sess_priv);
> >>
> >> -            if (s->inq[rte_lcore_id() % MAX_DPAA_CORES])
> >> -                    dpaa_sec_detach_rxq(qi,
> >> -                            s->inq[rte_lcore_id() % MAX_DPAA_CORES]);
> >> +            for (i = 0; i < MAX_DPAA_CORES; i++) {
> >> +                    if (s->inq[i])
> >> +                            dpaa_sec_detach_rxq(qi, s->inq[i]);
> >> +                    s->inq[i] = NULL;
> >> +                    s->qp[i] = NULL;
> >> +            }
> >>              rte_free(s->cipher_key.data);
> >>              rte_free(s->auth_key.data);
> >>              memset(s, 0, sizeof(dpaa_sec_session));
> >>
> >