From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 23CE8A0096 for ; Thu, 9 May 2019 12:38:13 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BE429493D; Thu, 9 May 2019 12:38:11 +0200 (CEST) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by dpdk.org (Postfix) with ESMTP id A4C8934F0; Thu, 9 May 2019 12:38:09 +0200 (CEST) Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id AF89C300BBA8; Thu, 9 May 2019 10:38:08 +0000 (UTC) Received: from [10.36.117.210] (ovpn-117-210.ams2.redhat.com [10.36.117.210]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9D38C5DD7B; Thu, 9 May 2019 10:38:06 +0000 (UTC) To: Rahul Lakkireddy Cc: "dev@dpdk.org" , Nirranjan Kirubaharan , Indranil Choudhury , "stable@dpdk.org" , Ferruh Yigit , Yongseok Koh , Luca Boccassi References: <1555665721-11883-1-git-send-email-rahul.lakkireddy@chelsio.com> <9f373d3f-6701-8b68-9a56-f7f1db866e00@redhat.com> <20190509100331.GA16509@chelsio.com> From: Kevin Traynor Message-ID: <34e6c02a-7c06-03f6-1292-ffb618fc4c46@redhat.com> Date: Thu, 9 May 2019 11:38:05 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <20190509100331.GA16509@chelsio.com> Content-Type: text/plain; charset="UTF-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.47]); Thu, 09 May 2019 10:38:08 +0000 (UTC) Subject: Re: [dpdk-dev] [PATCH] net/cxgbe: update Chelsio T5/T6 NIC device ids X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190509103805.ou9hLvm4e7_bvfpbqdOgPIljVbTNYMpocHZy6l4ddwg@z> On 09/05/2019 11:03, Rahul Lakkireddy wrote: > On Thursday, May 05/09/19, 2019 at 14:29:05 +0530, Kevin Traynor wrote: >> On 19/04/2019 10:22, Rahul Lakkireddy wrote: >>> Fixes: 04868e5bfddd ("net/cxgbe: add support to run Chelsio T6 cards") >>> Cc: stable@dpdk.org >>> >> >> Hi Rahul, >> >> Which stable release(s) is this change requested for? Have you tested >> these devices on those branches to ensure they work with the cxgbe pmd >> on those branches? >> >> Kevin. > > Hi Kevin, > > Please target 18.11 and 19.02 branches. All these devices work fine > in these branches. > Sorry, but this is not clear. There is no 19.02 branch and for 18.11 branch, I don't know if you tested some/all of the devices with that branch or are making assumption based on the cxgbe pmd in 18.11. I think these need to have some testing to be in 18.11.2. I will apply it, but requesting you to do some testing to check they're working as you expect when 18.11.2 RC is available (ETA for RC-1, week of 20th May). thanks, Kevin. > Thanks, > Rahul > >> >>> Signed-off-by: Rahul Lakkireddy >>> --- >>> drivers/net/cxgbe/base/t4_pci_id_tbl.h | 52 +++++++++++++++++++++++++- >>> 1 file changed, 51 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/net/cxgbe/base/t4_pci_id_tbl.h b/drivers/net/cxgbe/base/t4_pci_id_tbl.h >>> index 5f5cbe048..f5f027a2e 100644 >>> --- a/drivers/net/cxgbe/base/t4_pci_id_tbl.h >>> +++ b/drivers/net/cxgbe/base/t4_pci_id_tbl.h >>> @@ -1,5 +1,5 @@ >>> /* SPDX-License-Identifier: BSD-3-Clause >>> - * Copyright(c) 2014-2018 Chelsio Communications. >>> + * Copyright(c) 2014-2019 Chelsio Communications. >>> * All rights reserved. >>> */ >>> >>> @@ -103,6 +103,12 @@ CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN >>> CH_PCI_ID_TABLE_FENTRY(0x5013), /* T580-chr */ >>> CH_PCI_ID_TABLE_FENTRY(0x5014), /* T580-so */ >>> CH_PCI_ID_TABLE_FENTRY(0x5015), /* T502-bt */ >>> + CH_PCI_ID_TABLE_FENTRY(0x5016), /* T580-OCP-SO */ >>> + CH_PCI_ID_TABLE_FENTRY(0x5017), /* T520-OCP-SO */ >>> + CH_PCI_ID_TABLE_FENTRY(0x5018), /* T540-BT */ >>> + CH_PCI_ID_TABLE_FENTRY(0x5019), /* T540-LP-BT */ >>> + CH_PCI_ID_TABLE_FENTRY(0x501a), /* T540-SO-BT */ >>> + CH_PCI_ID_TABLE_FENTRY(0x501b), /* T540-SO-CR */ >>> CH_PCI_ID_TABLE_FENTRY(0x5080), /* Custom T540-cr */ >>> CH_PCI_ID_TABLE_FENTRY(0x5081), /* Custom T540-LL-cr */ >>> CH_PCI_ID_TABLE_FENTRY(0x5082), /* Custom T504-cr */ >>> @@ -116,19 +122,63 @@ CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN >>> CH_PCI_ID_TABLE_FENTRY(0x5090), /* Custom T540-CR */ >>> CH_PCI_ID_TABLE_FENTRY(0x5091), /* Custom T522-CR */ >>> CH_PCI_ID_TABLE_FENTRY(0x5092), /* Custom T520-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x5093), /* Custom T580-LP-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x5094), /* Custom T540-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x5095), /* Custom T540-CR-SO */ >>> + CH_PCI_ID_TABLE_FENTRY(0x5096), /* Custom T580-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x5097), /* Custom T520-KR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x5098), /* Custom 2x40G QSFP */ >>> + CH_PCI_ID_TABLE_FENTRY(0x5099), /* Custom 2x40G QSFP */ >>> + CH_PCI_ID_TABLE_FENTRY(0x509A), /* Custom T520-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x509B), /* Custom T540-CR LOM */ >>> + CH_PCI_ID_TABLE_FENTRY(0x509c), /* Custom T520-CR SFP+ LOM */ >>> + CH_PCI_ID_TABLE_FENTRY(0x509d), /* Custom T540-CR SFP+ */ >>> + CH_PCI_ID_TABLE_FENTRY(0x509e), /* Custom T520-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x509f), /* Custom T540-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50a0), /* Custom T540-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50a1), /* Custom T540-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50a2), /* Custom T580-KR4 */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50a3), /* Custom T580-KR4 */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50a4), /* Custom 2x T540-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50a5), /* Custom T522-BT */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50a6), /* Custom T522-BT-SO */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50a7), /* Custom T580-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50a8), /* Custom T580-KR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50a9), /* Custom T580-KR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50aa), /* Custom T580-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50ab), /* Custom T520-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50ac), /* Custom T540-BT */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50ad), /* Custom T520-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50ae), /* Custom T540-XL-SO */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50af), /* Custom T580-KR-SO */ >>> + CH_PCI_ID_TABLE_FENTRY(0x50b0), /* Custom T520-CR-LOM */ >>> >>> /* T6 adapter */ >>> CH_PCI_ID_TABLE_FENTRY(0x6001), /* T6225-CR */ >>> CH_PCI_ID_TABLE_FENTRY(0x6002), /* T6225-SO-CR */ >>> CH_PCI_ID_TABLE_FENTRY(0x6003), /* T6425-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x6004), /* T6425-SO-CR */ >>> CH_PCI_ID_TABLE_FENTRY(0x6005), /* T6225-OCP */ >>> + CH_PCI_ID_TABLE_FENTRY(0x6006), /* T62100-OCP-SO */ >>> CH_PCI_ID_TABLE_FENTRY(0x6007), /* T62100-LP-CR */ >>> CH_PCI_ID_TABLE_FENTRY(0x6008), /* T62100-SO-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x6009), /* T6210-BT */ >>> CH_PCI_ID_TABLE_FENTRY(0x600d), /* T62100-CR */ >>> CH_PCI_ID_TABLE_FENTRY(0x6011), /* T6225-LL-CR */ >>> CH_PCI_ID_TABLE_FENTRY(0x6014), /* T61100-OCP-SO */ >>> + CH_PCI_ID_TABLE_FENTRY(0x6015), /* T6201-BT */ >>> CH_PCI_ID_TABLE_FENTRY(0x6080), /* Custom T6225-CR SFP28 */ >>> CH_PCI_ID_TABLE_FENTRY(0x6081), /* Custom T62100-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x6082), /* Custom T6225-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x6083), /* Custom T62100-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x6084), /* Custom T64100-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x6085), /* Custom T6240-SO */ >>> + CH_PCI_ID_TABLE_FENTRY(0x6086), /* Custom T6225-SO-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x6087), /* Custom T6225-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x6088), /* Custom T62100-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x6089), /* Custom T62100-KR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x608a), /* Custom T62100-CR */ >>> + CH_PCI_ID_TABLE_FENTRY(0x608b), /* Custom T6225-CR */ >>> CH_PCI_DEVICE_ID_TABLE_DEFINE_END; >>> >>> #endif /* CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN */ >>> >>