[dpdk-dev] [PATCH v2 04/44] event/octeontx2: add device configure function

[<pbhagavatula@marvell.com>]

From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Add the device configure function that attaches the requested number of
SSO GWS(event ports) and GGRP(event queues) LF's to the PF.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 drivers/event/octeontx2/otx2_evdev.c | 258 +++++++++++++++++++++++++++
 drivers/event/octeontx2/otx2_evdev.h |  10 ++
 2 files changed, 268 insertions(+)

diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index 839a5ccaa..00996578a 100644
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -37,9 +37,267 @@ otx2_sso_info_get(struct rte_eventdev *event_dev,
 					RTE_EVENT_DEV_CAP_NONSEQ_MODE;
 }
 
+static int
+sso_hw_lf_cfg(struct otx2_mbox *mbox, enum otx2_sso_lf_type type,
+	      uint16_t nb_lf, uint8_t attach)
+{
+	if (attach) {
+		struct rsrc_attach_req *req;
+
+		req = otx2_mbox_alloc_msg_attach_resources(mbox);
+		switch (type) {
+		case SSO_LF_GGRP:
+			req->sso = nb_lf;
+			break;
+		case SSO_LF_GWS:
+			req->ssow = nb_lf;
+			break;
+		default:
+			return -EINVAL;
+		}
+		req->modify = true;
+		if (otx2_mbox_process(mbox) < 0)
+			return -EIO;
+	} else {
+		struct rsrc_detach_req *req;
+
+		req = otx2_mbox_alloc_msg_detach_resources(mbox);
+		switch (type) {
+		case SSO_LF_GGRP:
+			req->sso = true;
+			break;
+		case SSO_LF_GWS:
+			req->ssow = true;
+			break;
+		default:
+			return -EINVAL;
+		}
+		req->partial = true;
+		if (otx2_mbox_process(mbox) < 0)
+			return -EIO;
+	}
+
+	return 0;
+}
+
+static int
+sso_lf_cfg(struct otx2_sso_evdev *dev, struct otx2_mbox *mbox,
+	   enum otx2_sso_lf_type type, uint16_t nb_lf, uint8_t alloc)
+{
+	void *rsp;
+	int rc;
+
+	if (alloc) {
+		switch (type) {
+		case SSO_LF_GGRP:
+			{
+			struct sso_lf_alloc_req *req_ggrp;
+			req_ggrp = otx2_mbox_alloc_msg_sso_lf_alloc(mbox);
+			req_ggrp->hwgrps = nb_lf;
+			}
+			break;
+		case SSO_LF_GWS:
+			{
+			struct ssow_lf_alloc_req *req_hws;
+			req_hws = otx2_mbox_alloc_msg_ssow_lf_alloc(mbox);
+			req_hws->hws = nb_lf;
+			}
+			break;
+		default:
+			return -EINVAL;
+		}
+	} else {
+		switch (type) {
+		case SSO_LF_GGRP:
+			{
+			struct sso_lf_free_req *req_ggrp;
+			req_ggrp = otx2_mbox_alloc_msg_sso_lf_free(mbox);
+			req_ggrp->hwgrps = nb_lf;
+			}
+			break;
+		case SSO_LF_GWS:
+			{
+			struct ssow_lf_free_req *req_hws;
+			req_hws = otx2_mbox_alloc_msg_ssow_lf_free(mbox);
+			req_hws->hws = nb_lf;
+			}
+			break;
+		default:
+			return -EINVAL;
+		}
+	}
+
+	rc = otx2_mbox_process_msg_tmo(mbox, (void **)&rsp, ~0);
+	if (rc < 0)
+		return rc;
+
+	if (alloc && type == SSO_LF_GGRP) {
+		struct sso_lf_alloc_rsp *rsp_ggrp = rsp;
+
+		dev->xaq_buf_size = rsp_ggrp->xaq_buf_size;
+		dev->xae_waes = rsp_ggrp->xaq_wq_entries;
+		dev->iue = rsp_ggrp->in_unit_entries;
+	}
+
+	return 0;
+}
+
+static int
+sso_configure_ports(const struct rte_eventdev *event_dev)
+{
+	struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
+	struct otx2_mbox *mbox = dev->mbox;
+	uint8_t nb_lf;
+	int rc;
+
+	otx2_sso_dbg("Configuring event ports %d", dev->nb_event_ports);
+
+	nb_lf = dev->nb_event_ports;
+	/* Ask AF to attach required LFs. */
+	rc = sso_hw_lf_cfg(mbox, SSO_LF_GWS, nb_lf, true);
+	if (rc < 0) {
+		otx2_err("Failed to attach SSO GWS LF");
+		return -ENODEV;
+	}
+
+	if (sso_lf_cfg(dev, mbox, SSO_LF_GWS, nb_lf, true) < 0) {
+		sso_hw_lf_cfg(mbox, SSO_LF_GWS, nb_lf, false);
+		otx2_err("Failed to init SSO GWS LF");
+		return -ENODEV;
+	}
+
+	return rc;
+}
+
+static int
+sso_configure_queues(const struct rte_eventdev *event_dev)
+{
+	struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
+	struct otx2_mbox *mbox = dev->mbox;
+	uint8_t nb_lf;
+	int rc;
+
+	otx2_sso_dbg("Configuring event queues %d", dev->nb_event_queues);
+
+	nb_lf = dev->nb_event_queues;
+	/* Ask AF to attach required LFs. */
+	rc = sso_hw_lf_cfg(mbox, SSO_LF_GGRP, nb_lf, true);
+	if (rc < 0) {
+		otx2_err("Failed to attach SSO GGRP LF");
+		return -ENODEV;
+	}
+
+	if (sso_lf_cfg(dev, mbox, SSO_LF_GGRP, nb_lf, true) < 0) {
+		sso_hw_lf_cfg(mbox, SSO_LF_GGRP, nb_lf, false);
+		otx2_err("Failed to init SSO GGRP LF");
+		return -ENODEV;
+	}
+
+	return rc;
+}
+
+static void
+sso_lf_teardown(struct otx2_sso_evdev *dev,
+		enum otx2_sso_lf_type lf_type)
+{
+	uint8_t nb_lf;
+
+	switch (lf_type) {
+	case SSO_LF_GGRP:
+		nb_lf = dev->nb_event_queues;
+		break;
+	case SSO_LF_GWS:
+		nb_lf = dev->nb_event_ports;
+		break;
+	default:
+		return;
+	}
+
+	sso_lf_cfg(dev, dev->mbox, lf_type, nb_lf, false);
+	sso_hw_lf_cfg(dev->mbox, lf_type, nb_lf, false);
+}
+
+static int
+otx2_sso_configure(const struct rte_eventdev *event_dev)
+{
+	struct rte_event_dev_config *conf = &event_dev->data->dev_conf;
+	struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
+	uint32_t deq_tmo_ns;
+	int rc;
+
+	sso_func_trace();
+	deq_tmo_ns = conf->dequeue_timeout_ns;
+
+	if (deq_tmo_ns == 0)
+		deq_tmo_ns = dev->min_dequeue_timeout_ns;
+
+	if (deq_tmo_ns < dev->min_dequeue_timeout_ns ||
+	    deq_tmo_ns > dev->max_dequeue_timeout_ns) {
+		otx2_err("Unsupported dequeue timeout requested");
+		return -EINVAL;
+	}
+
+	if (conf->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT)
+		dev->is_timeout_deq = 1;
+
+	dev->deq_tmo_ns = deq_tmo_ns;
+
+	if (conf->nb_event_ports > dev->max_event_ports ||
+	    conf->nb_event_queues > dev->max_event_queues) {
+		otx2_err("Unsupported event queues/ports requested");
+		return -EINVAL;
+	}
+
+	if (conf->nb_event_port_dequeue_depth > 1) {
+		otx2_err("Unsupported event port deq depth requested");
+		return -EINVAL;
+	}
+
+	if (conf->nb_event_port_enqueue_depth > 1) {
+		otx2_err("Unsupported event port enq depth requested");
+		return -EINVAL;
+	}
+
+	if (dev->nb_event_queues) {
+		/* Finit any previous queues. */
+		sso_lf_teardown(dev, SSO_LF_GGRP);
+	}
+	if (dev->nb_event_ports) {
+		/* Finit any previous ports. */
+		sso_lf_teardown(dev, SSO_LF_GWS);
+	}
+
+	dev->nb_event_queues = conf->nb_event_queues;
+	dev->nb_event_ports = conf->nb_event_ports;
+
+	if (sso_configure_ports(event_dev)) {
+		otx2_err("Failed to configure event ports");
+		return -ENODEV;
+	}
+
+	if (sso_configure_queues(event_dev) < 0) {
+		otx2_err("Failed to configure event queues");
+		rc = -ENODEV;
+		goto teardown_hws;
+	}
+
+	dev->configured = 1;
+	rte_mb();
+
+	return 0;
+
+teardown_hws:
+	sso_lf_teardown(dev, SSO_LF_GWS);
+	dev->nb_event_queues = 0;
+	dev->nb_event_ports = 0;
+	dev->configured = 0;
+	return rc;
+}
+
 /* Initialize and register event driver with DPDK Application */
 static struct rte_eventdev_ops otx2_sso_ops = {
 	.dev_infos_get    = otx2_sso_info_get,
+	.dev_configure    = otx2_sso_configure,
 };
 
 static int
diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h
index 4427efcad..feb4ed6f4 100644
--- a/drivers/event/octeontx2/otx2_evdev.h
+++ b/drivers/event/octeontx2/otx2_evdev.h
@@ -20,6 +20,11 @@
 
 #define USEC2NSEC(__us)                 ((__us) * 1E3)
 
+enum otx2_sso_lf_type {
+	SSO_LF_GGRP,
+	SSO_LF_GWS
+};
+
 struct otx2_sso_evdev {
 	OTX2_DEV; /* Base class */
 	uint8_t max_event_queues;
@@ -27,10 +32,15 @@ struct otx2_sso_evdev {
 	uint8_t is_timeout_deq;
 	uint8_t nb_event_queues;
 	uint8_t nb_event_ports;
+	uint8_t configured;
 	uint32_t deq_tmo_ns;
 	uint32_t min_dequeue_timeout_ns;
 	uint32_t max_dequeue_timeout_ns;
 	int32_t max_num_events;
+	/* HW const */
+	uint32_t xae_waes;
+	uint32_t xaq_buf_size;
+	uint32_t iue;
 } __rte_cache_aligned;
 
 static inline struct otx2_sso_evdev *
-- 
2.22.0